From patchwork Thu Dec 29 21:53:55 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 709586 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3tqNfg31Mjz9sR9 for ; Fri, 30 Dec 2016 08:54:19 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="MfvWplPZ"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:cc:content-type; q=dns; s=default; b=MGwcnlryaXhZuKAGFGUY3HzAVjhEXwir8s3Cvc8SuUK zCBTqUcqjBZ0LWVo+xe12c4aMMLE1H5VsKxFjo7txO2O52q2V2PNCYdiLgl6YHwt /GL2mS1yeuqJGHvn0zLqESHz9o40lq2Y6TqXjpmaCyu0C/vdbKdQMgRgwwqTp7nU = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:cc:content-type; s=default; bh=1bE/YsNriseKnzttCHH1MGfCTjE=; b=MfvWplPZ66hRqq9Pr /zGmj/mvPnpqTbH5DTWY6x1rn4YLJ5HkUOhir67JmLaHu6vf/FMsXFwrQcl28xcA uEd1YrB+hMZanC9DKp9DX7IZMlqFYajCcSWdBuLYt//Lij0y7umoU9sG4t7WVk+i TFJS4v8tTu1dot/NL0NM788N2c= Received: (qmail 128550 invoked by alias); 29 Dec 2016 21:54:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 128528 invoked by uid 89); 29 Dec 2016 21:54:08 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=1.3 required=5.0 tests=AWL, BAYES_50, FREEMAIL_FROM, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=no version=3.3.2 spammy=ubizjak@gmail.com, ubizjakgmailcom, att, rm X-HELO: mail-ua0-f179.google.com Received: from mail-ua0-f179.google.com (HELO mail-ua0-f179.google.com) (209.85.217.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 29 Dec 2016 21:53:58 +0000 Received: by mail-ua0-f179.google.com with SMTP id v2so65309925uac.2 for ; Thu, 29 Dec 2016 13:53:58 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to:cc; bh=iWnOAR+LnpL33Wlwr2vMdsQ/we0HPtYvCCq6P8b/bic=; b=skxI8h7lRmUkCR5GCAU2Z7p4v2he+qsPd/KZubybyZofPhLPP2bhFRzr54eFlkDnt0 Hc8/WOuUQ7flOshlx/GE7+dbBkBB5n7hzd6b4ctr97LDUNKP4VQfj5ymD35Mac2nCrcb hAgr3dMttMwb7A8k9q+FtPoLUp11x5ytpxtG3rWfFBjqSbIdm8CA7cTPSh2SNNpDW/GH Pwy3rOYndt54YaVXApOFkZlqxGl+FmY57/L4vLsOOLTiqJSEGcy4twlKD5Il8IKgTTD5 qEHfpSe/88DHdgob+0qLpuzf/3skRT1C9MQILcTJeBxzfF0llgWp/ZuMYHlYPoPVRhVd oWMA== X-Gm-Message-State: AIkVDXKNtAnbqhXZip8/hHXjLepezK9dSahNnuNQZXar9iQ6zE9yYOl1XWdugTswXjiru7BSQLKM6mDNQC3iLg== X-Received: by 10.176.74.221 with SMTP id t29mr30439367uae.119.1483048436325; Thu, 29 Dec 2016 13:53:56 -0800 (PST) MIME-Version: 1.0 Received: by 10.103.87.11 with HTTP; Thu, 29 Dec 2016 13:53:55 -0800 (PST) From: Uros Bizjak Date: Thu, 29 Dec 2016 22:53:55 +0100 Message-ID: Subject: [PATCH, i386]: Remove unneeded *extvqi sign-extract pattern To: "gcc-patches@gcc.gnu.org" Cc: Segher Boessenkool Hello! Attached patch removes unneeded *extvqi sign-extract pattern. Combine is smart enough to create zero-extract RTX in case QImode value is extracted to QImode register. OTOH, the following testcase --cut here-- struct S1 { char pad1; char val; short pad2; }; struct S1 test_add (struct S1 a, struct S1 b) { a.val += b.val; return a; } --cut here-- still compiles to: movl %edi, %eax movl %esi, %ecx movsbl %ah, %edx movsbl %ch, %esi addl %esi, %edx movb %dl, %ah since combine doesn't simplify sign-extract in: Trying 7, 9 -> 10: Failed to match this instruction: (set (zero_extract:SI (reg/v:SI 95 [ a ]) (const_int 8 [0x8]) (const_int 8 [0x8])) (subreg:SI (plus:QI (subreg:QI (sign_extract:SI (reg/v:SI 95 [ a ]) (const_int 8 [0x8]) (const_int 8 [0x8])) 0) (reg:QI 98)) 0)) to a zero-extract, although we have QImode operation. This should follow the same reasoning as in the attached testcase, where: (insn 8 4 9 2 (set (reg:SI 91) (sign_extract:SI (reg/v:SI 88 [ a ]) (const_int 8 [0x8]) (const_int 8 [0x8]))) "pr78904-6.c":18 102 {*extvsi} (expr_list:REG_DEAD (reg/v:SI 88 [ a ]) (nil))) (insn 9 8 0 2 (set (mem/j:QI (plus:DI (reg/v:DI 89 [ i ]) (symbol_ref:DI ("t") [flags 0x40] )) [0 t S1 A8]) (subreg:QI (reg:SI 91) 0)) "pr78904-6.c":18 84 {*movqi_internal} (expr_list:REG_DEAD (reg:SI 91) (expr_list:REG_DEAD (reg/v:DI 89 [ i ]) (nil)))) simplifies to Trying 8 -> 9: Successfully matched this instruction: (set (mem/j:QI (plus:DI (reg/v:DI 89 [ i ]) (symbol_ref:DI ("t") [flags 0x40] )) [0 t S1 A8]) (subreg:QI (zero_extract:SI (reg/v:SI 88 [ a ]) (const_int 8 [0x8]) (const_int 8 [0x8])) 0)) I'll open a PR for the above combine deficiency. 2016-12-29 Uros Bizjak PR target/78904 * config/i386/i386.md (*extvqi): Remove insn pattern. (divmodqi4): Update expander to generate QImode zero-extract from AH. testsuite/ChangeLog: 2016-12-29 Uros Bizjak PR target/78904 * gcc.target/i386/pr78904-6.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 243963) +++ config/i386/i386.md (working copy) @@ -2780,33 +2780,6 @@ [(set_attr "type" "imovx") (set_attr "mode" "SI")]) -(define_insn "*extvqi" - [(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m") - (sign_extract:QI (match_operand 1 "ext_register_operand" "Q,Q,Q") - (const_int 8) - (const_int 8)))] - "" -{ - switch (get_attr_type (insn)) - { - case TYPE_IMOVX: - return "movs{bl|x}\t{%h1, %k0|%k0, %h1}"; - default: - return "mov{b}\t{%h1, %0|%0, %h1}"; - } -} - [(set_attr "isa" "*,*,nox64") - (set (attr "type") - (if_then_else (and (match_operand:QI 0 "register_operand") - (ior (not (match_operand:QI 0 "QIreg_operand")) - (match_test "TARGET_MOVX"))) - (const_string "imovx") - (const_string "imov"))) - (set (attr "mode") - (if_then_else (eq_attr "type" "imovx") - (const_string "SI") - (const_string "QI")))]) - (define_expand "extzv" [(set (match_operand:SWI248 0 "register_operand") (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand") @@ -7586,7 +7559,8 @@ emit_insn (gen_divmodhiqi3 (tmp0, tmp1, operands[2])); /* Extract remainder from AH. */ - tmp1 = gen_rtx_SIGN_EXTRACT (QImode, tmp0, GEN_INT (8), GEN_INT (8)); + tmp1 = gen_rtx_ZERO_EXTRACT (SImode, tmp0, GEN_INT (8), GEN_INT (8)); + tmp1 = gen_rtx_SUBREG (QImode, tmp1, 0); rtx_insn *insn = emit_move_insn (operands[3], tmp1); mod = gen_rtx_MOD (QImode, operands[1], operands[2]); Index: testsuite/gcc.target/i386/pr78904-6.c =================================================================== --- testsuite/gcc.target/i386/pr78904-6.c (nonexistent) +++ testsuite/gcc.target/i386/pr78904-6.c (working copy) @@ -0,0 +1,21 @@ +/* PR target/78904 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -masm=att" } */ + +typedef __SIZE_TYPE__ size_t; + +struct S1 +{ + char pad1; + char val; + short pad2; +}; + +extern char t[256]; + +void foo (struct S1 a, size_t i) +{ + t[i] = a.val; +} + +/* { dg-final { scan-assembler "\[ \t\]movb\[\t \]*%.h," } } */