From patchwork Fri Jul 10 10:08:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 493728 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8DD3B1402DE for ; Fri, 10 Jul 2015 20:08:39 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=xJs8ZCqT; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; q=dns; s=default; b=riJzYu27ln/+cTnWYi 9hsZkzE7CvI5vfVYvbejnbIig4ZnXEO7Xr0he2R2B/HlU9I6TyWizFXESDSIEVty Y6ooSI87mRpQs4q/M8LRThFc0T+6AZnaFWNrhEOW54aPNNJUFfq0/U00YEyDO4kt toHh8fQhKACrTb8aYlVc4UCAc= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:in-reply-to:references:date:message-id:subject :from:to:cc:content-type; s=default; bh=yn/igR8lSUELcNjKE6+58LJu 8Zc=; b=xJs8ZCqT3LZBBnOTweWLHIXm/ClO5FuHBSTM+aNE/Gv05gafhTR4M/1c dboW0hLxikOawFuHGVaI+CTsagt5JRPdRi9vVeXTkpNAVZyYm4s5xXWNG6pGYbJU 92w4CCqd0EpK2NgJZ2GBT9l7aDz6xwY0qyrXfWydYWacem9RcFE= Received: (qmail 102672 invoked by alias); 10 Jul 2015 10:08:32 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 102662 invoked by uid 89); 10 Jul 2015 10:08:32 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: mail-oi0-f42.google.com Received: from mail-oi0-f42.google.com (HELO mail-oi0-f42.google.com) (209.85.218.42) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Fri, 10 Jul 2015 10:08:31 +0000 Received: by oibp128 with SMTP id p128so46776378oib.3 for ; Fri, 10 Jul 2015 03:08:28 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.202.55.7 with SMTP id e7mr17710057oia.56.1436522908673; Fri, 10 Jul 2015 03:08:28 -0700 (PDT) Received: by 10.60.147.170 with HTTP; Fri, 10 Jul 2015 03:08:28 -0700 (PDT) In-Reply-To: References: <20150709131052.GA7254@intel.com> Date: Fri, 10 Jul 2015 12:08:28 +0200 Message-ID: Subject: Re: [PATCH] PR target/66813: gcc.target/i386/asm-flag-5.c failed with -march=pentium From: Uros Bizjak To: "H.J. Lu" Cc: "gcc-patches@gcc.gnu.org" , Richard Henderson On Thu, Jul 9, 2015 at 3:15 PM, Uros Bizjak wrote: >> gen_rtx_ZERO_EXTEND isn't suitable in ix86_md_asm_adjust since ZERO_EXTEND >> may be expaned. We should call gen_zero_extendqiXi2 instead. >> >> OK for trunk? > > No, your patch will clobber flags when multiple flag outputs are used. > > (I plan to rewrite x86 zero_extend patterns to use preferred_for_size > attribute with peepholes, this will magically solve this bug and > readeflags-1.c failure). No, the above mentioned patch won't fly, it limits AND insn operands too much with "q" constraint. So, the patch below is what I plan to commit after bootstrap/regression test on x86_64-linux-gnu {,-m32}. 2015-07-10 Uros Bizjak PR target/66813 * config/i386/i386.c (ix86_md_asm_adjust): Emit movstrictqi sequence for TARGET_ZERO_EXTEND_WITH_AND targets. testsuite/ChangeLog: 2015-07-10 Uros Bizjak PR target/66813 * gcc.target/i386/pr66813.c: New test. Uros. Index: testsuite/gcc.target/i386/pr66813.c =================================================================== --- testsuite/gcc.target/i386/pr66813.c (revision 0) +++ testsuite/gcc.target/i386/pr66813.c (revision 0) @@ -0,0 +1,4 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-march=pentium" } */ + +#include "asm-flag-5.c" Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 225648) +++ config/i386/i386.c (working copy) @@ -45842,7 +45842,17 @@ ix86_md_asm_adjust (vec &outputs, vec &/ { rtx destqi = gen_reg_rtx (QImode); emit_insn (gen_rtx_SET (destqi, x)); - x = gen_rtx_ZERO_EXTEND (dest_mode, destqi); + + if (TARGET_ZERO_EXTEND_WITH_AND + && optimize_function_for_speed_p (cfun)) + { + x = force_reg (dest_mode, const0_rtx); + + emit_insn (gen_movstrictqi + (gen_lowpart (QImode, x), destqi)); + } + else + x = gen_rtx_ZERO_EXTEND (dest_mode, destqi); } emit_insn (gen_rtx_SET (dest, x)); }