From patchwork Tue Dec 8 08:58:06 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 553828 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6C6D71402D6 for ; Tue, 8 Dec 2015 19:58:18 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=nzxhwylg; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; q= dns; s=default; b=JuaSn5raSZoqMu8eizS9lFjioKy8DeGpb+egg1+3X1Bq/p G/g6LY8SK3XdjCbLx+L1Mz29hMKIRewqv1NAjMYJWTM6SjHAVnDVwqfqYXEjvVBU jpan0zOLcroHm3c+gvLJWxY8MTf7uiJ1te5JQjdgMh12eoarQ91QqhWc2NFjw= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:content-type; s= default; bh=m0nRWkuNSVLeI/S2bkJizB3YT5U=; b=nzxhwylgJ4SOjlVM/Twa GkJMkRCrahlH+5l2fA/kR5o7Le6o+Sn/EBZNK1fex3AbDVN6OBX/p0BEqxWr+gGE jOUei2ba6QMvgNVp46nPBkNfESRWn1WpPnS3lVjTPkoqXqG7JJsx2jQzRWfpfZpS Z8q3bPnBoeACkV8Dn6ZCF0A= Received: (qmail 75038 invoked by alias); 8 Dec 2015 08:58:10 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 75014 invoked by uid 89); 8 Dec 2015 08:58:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.2 required=5.0 tests=AWL, BAYES_40, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-ob0-f177.google.com Received: from mail-ob0-f177.google.com (HELO mail-ob0-f177.google.com) (209.85.214.177) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Tue, 08 Dec 2015 08:58:08 +0000 Received: by obciw8 with SMTP id iw8so8862885obc.1 for ; Tue, 08 Dec 2015 00:58:06 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.182.114.167 with SMTP id jh7mr1560419obb.70.1449565086720; Tue, 08 Dec 2015 00:58:06 -0800 (PST) Received: by 10.60.138.70 with HTTP; Tue, 8 Dec 2015 00:58:06 -0800 (PST) Date: Tue, 8 Dec 2015 09:58:06 +0100 Message-ID: Subject: [PATCH, i386]: Cleanup ix86_emit_swsqrtsf a bit From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" No functional changes. 2015-12-08 Uros Bizjak * config/i386/i386.c (ix86_emit_swsqrtsf): Cleanup infinity filterning code. Bootstrapped and regression tested on x86_64-linux-gnu, committed to mainline SVN. Uros. Index: config/i386/i386.c =================================================================== --- config/i386/i386.c (revision 231355) +++ config/i386/i386.c (working copy) @@ -47827,8 +47827,7 @@ void ix86_emit_swdivsf (rtx res, rtx a, rtx b, mac /* Output code to perform a Newton-Rhapson approximation of a single precision floating point [reciprocal] square root. */ -void ix86_emit_swsqrtsf (rtx res, rtx a, machine_mode mode, - bool recip) +void ix86_emit_swsqrtsf (rtx res, rtx a, machine_mode mode, bool recip) { rtx x0, e0, e1, e2, e3, mthree, mhalf; REAL_VALUE_TYPE r; @@ -47868,13 +47867,9 @@ void ix86_emit_swdivsf (rtx res, rtx a, rtx b, mac /* If (a == 0.0) Filter out infinity to prevent NaN for sqrt(0.0). */ if (!recip) { - rtx zero, mask; + rtx zero = force_reg (mode, CONST0_RTX(mode)); + rtx mask; - zero = gen_reg_rtx (mode); - mask = gen_reg_rtx (mode); - - zero = force_reg (mode, CONST0_RTX(mode)); - /* Handle masked compare. */ if (VECTOR_MODE_P (mode) && GET_MODE_SIZE (mode) == 64) { @@ -47885,8 +47880,8 @@ void ix86_emit_swdivsf (rtx res, rtx a, rtx b, mac } else { + mask = gen_reg_rtx (mode); emit_insn (gen_rtx_SET (mask, gen_rtx_NE (mode, zero, a))); - emit_insn (gen_rtx_SET (x0, gen_rtx_AND (mode, x0, mask))); } }