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X-HELO: mail-yw0-f173.google.com Received: from mail-yw0-f173.google.com (HELO mail-yw0-f173.google.com) (209.85.161.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-GCM-SHA256 encrypted) ESMTPS; Thu, 05 May 2016 20:38:09 +0000 Received: by mail-yw0-f173.google.com with SMTP id t10so162465101ywa.0 for ; Thu, 05 May 2016 13:38:09 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:date:message-id:subject:from:to; bh=VGvyyo8H5VxHfVR08dLtnyU4bhTyq16ceErpotlocjs=; b=BwFwmXIrolZf31CYgUCL5gwM64wv3aaVNNhk1hJzdn+LExz861EKFxgZieMVSIIeaQ AobQFa28jtZo1CiXc4akmvwjo7G/fKvlJopVOfQZuXu8DA2QfNwYrJjs5S/aBLaiFjSM Hwkb+VHJv1eBnipGAvhmafsTIEPZ7bQSEoAn21uzLRJEL9/Buvza30chwC7aObGZHNie 6bB/xpqCAUzmCmj0dwv5cL1EhEtDcZx4Va8DFvxt+VY3A4YOtAUpanmlDBiKEfsAFD77 5RFf1svOo1TEyf785CYikl4MNYWQjYEAX2Iswd50MgkF8LmrZWASP0LPWlO7GXuiT955 L1rg== X-Gm-Message-State: AOPr4FXEYySv8EIrkECWTCsMuKcLTuGustIupck8Q4kcs/7M1AQRhf7qSQRo/sF3rnByYL3IhJF81OSq9GotcQ== MIME-Version: 1.0 X-Received: by 10.176.64.40 with SMTP id h37mr10812249uad.58.1462480687274; Thu, 05 May 2016 13:38:07 -0700 (PDT) Received: by 10.103.76.220 with HTTP; Thu, 5 May 2016 13:38:07 -0700 (PDT) Date: Thu, 5 May 2016 22:38:07 +0200 Message-ID: Subject: [PATCH, i386]: Change true_regnum to REGNO in peephole2 and post-reload splitters From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" Hello! There is no point to determine regno of register operand using true_regnum in peephole2s and post-reload splitters. REGNO can be used instead. 2016-05-05 Uros Bizjak * config/i386/i386.md (peehole2 patterns): Change true_regnum to REGNO in all peephole2 patterns. (post-reload splitters): Change true_regnum to REGNO in post-reload splitters. (zero_extend splitters): Use general_reg_operand and nonimmediate_gr_operand predicates. Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: i386.md =================================================================== --- i386.md (revision 235906) +++ i386.md (working copy) @@ -3777,20 +3777,18 @@ "split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]);") (define_split - [(set (match_operand:DI 0 "register_operand") - (zero_extend:DI (match_operand:SI 1 "register_operand")))] + [(set (match_operand:DI 0 "general_reg_operand") + (zero_extend:DI (match_operand:SI 1 "general_reg_operand")))] "!TARGET_64BIT && reload_completed - && !(MMX_REG_P (operands[0]) || SSE_REG_P (operands[0])) - && true_regnum (operands[0]) == true_regnum (operands[1])" + && REGNO (operands[0]) == REGNO (operands[1])" [(set (match_dup 4) (const_int 0))] "split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]);") (define_split - [(set (match_operand:DI 0 "nonimmediate_operand") - (zero_extend:DI (match_operand:SI 1 "nonimmediate_operand")))] + [(set (match_operand:DI 0 "nonimmediate_gr_operand") + (zero_extend:DI (match_operand:SI 1 "nonimmediate_gr_operand")))] "!TARGET_64BIT && reload_completed - && !(MEM_P (operands[0]) && MEM_P (operands[1])) - && !(MMX_REG_P (operands[0]) || SSE_REG_P (operands[0]))" + && !(MEM_P (operands[0]) && MEM_P (operands[1]))" [(set (match_dup 3) (match_dup 1)) (set (match_dup 4) (const_int 0))] "split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]);") @@ -3828,7 +3826,8 @@ [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (match_dup 2))) (clobber (reg:CC FLAGS_REG))])] { - if (true_regnum (operands[0]) != true_regnum (operands[1])) + if (!REG_P (operands[1]) + || REGNO (operands[0]) != REGNO (operands[1])) { ix86_expand_clear (operands[0]); @@ -3875,7 +3874,8 @@ [(parallel [(set (match_dup 0) (and:SI (match_dup 0) (const_int 255))) (clobber (reg:CC FLAGS_REG))])] { - if (true_regnum (operands[0]) != true_regnum (operands[1])) + if (!REG_P (operands[1]) + || REGNO (operands[0]) != REGNO (operands[1])) { ix86_expand_clear (operands[0]); @@ -3988,8 +3988,8 @@ /* Generate a cltd if possible and doing so it profitable. */ if ((optimize_function_for_size_p (cfun) || TARGET_USE_CLTD) - && true_regnum (operands[1]) == AX_REG - && true_regnum (operands[2]) == DX_REG) + && REGNO (operands[1]) == AX_REG + && REGNO (operands[2]) == DX_REG) { emit_insn (gen_ashrsi3_cvt (operands[2], operands[1], GEN_INT (31))); } @@ -4030,8 +4030,8 @@ (set (match_operand:SI 3 "memory_operand") (match_dup 2))] "/* cltd is shorter than sarl $31, %eax */ !optimize_function_for_size_p (cfun) - && true_regnum (operands[1]) == AX_REG - && true_regnum (operands[2]) == DX_REG + && REGNO (operands[1]) == AX_REG + && REGNO (operands[2]) == DX_REG && peep2_reg_dead_p (2, operands[1]) && peep2_reg_dead_p (3, operands[2]) && !reg_mentioned_p (operands[2], operands[3])" @@ -4052,19 +4052,19 @@ { split_double_mode (DImode, &operands[0], 1, &operands[3], &operands[4]); - if (true_regnum (operands[3]) != true_regnum (operands[1])) + if (REGNO (operands[3]) != REGNO (operands[1])) emit_move_insn (operands[3], operands[1]); /* Generate a cltd if possible and doing so it profitable. */ if ((optimize_function_for_size_p (cfun) || TARGET_USE_CLTD) - && true_regnum (operands[3]) == AX_REG - && true_regnum (operands[4]) == DX_REG) + && REGNO (operands[3]) == AX_REG + && REGNO (operands[4]) == DX_REG) { emit_insn (gen_ashrsi3_cvt (operands[4], operands[3], GEN_INT (31))); DONE; } - if (true_regnum (operands[4]) != true_regnum (operands[1])) + if (REGNO (operands[4]) != REGNO (operands[1])) emit_move_insn (operands[4], operands[1]); emit_insn (gen_ashrsi3_cvt (operands[4], operands[4], GEN_INT (31))); @@ -5207,7 +5207,7 @@ "TARGET_SSE_PARTIAL_REG_DEPENDENCY && optimize_function_for_speed_p (cfun) && epilogue_completed - && (!SSE_REG_P (operands[1]) + && (!REG_P (operands[1]) || REGNO (operands[0]) != REGNO (operands[1])) && (!EXT_REX_SSE_REG_P (operands[0]) || TARGET_AVX512VL)" @@ -5235,7 +5235,7 @@ "TARGET_SSE_PARTIAL_REG_DEPENDENCY && optimize_function_for_speed_p (cfun) && epilogue_completed - && (!SSE_REG_P (operands[1]) + && (!REG_P (operands[1]) || REGNO (operands[0]) != REGNO (operands[1])) && (!EXT_REX_SSE_REG_P (operands[0]) || TARGET_AVX512VL)" @@ -7196,7 +7196,7 @@ (match_operand:DWIH 2 "nonimmediate_operand")))) (clobber (reg:CC FLAGS_REG))] "TARGET_BMI2 && reload_completed - && true_regnum (operands[1]) == DX_REG" + && REGNO (operands[1]) == DX_REG" [(parallel [(set (match_dup 3) (mult:DWIH (match_dup 1) (match_dup 2))) (set (match_dup 4) @@ -8341,7 +8341,8 @@ (match_operand:SWI248 2 "const_int_operand"))) (clobber (reg:CC FLAGS_REG))] "reload_completed - && true_regnum (operands[0]) != true_regnum (operands[1])" + && (!REG_P (operands[1]) + || REGNO (operands[0]) != REGNO (operands[1]))" [(const_int 0)] { HOST_WIDE_INT ival = INTVAL (operands[2]); @@ -9302,12 +9303,12 @@ [(set (match_dup 0) (match_op_dup 1 [(match_dup 0)]))]) (define_split - [(set (match_operand 0 "register_operand") + [(set (match_operand 0 "sse_reg_operand") (match_operator 3 "absneg_operator" [(match_operand 1 "register_operand")])) (use (match_operand 2 "nonimmediate_operand")) (clobber (reg:CC FLAGS_REG))] - "reload_completed && SSE_REG_P (operands[0])" + "reload_completed" [(set (match_dup 0) (match_dup 3))] { machine_mode mode = GET_MODE (operands[0]); @@ -9398,8 +9399,7 @@ { rtx tmp; operands[0] = gen_rtx_REG (SImode, - true_regnum (operands[0]) - + (TARGET_64BIT ? 1 : 2)); + REGNO (operands[0]) + (TARGET_64BIT ? 1 : 2)); if (GET_CODE (operands[1]) == ABS) { tmp = GEN_INT (0x7fff); @@ -10091,7 +10091,7 @@ (clobber (reg:CC FLAGS_REG))] "GET_MODE (operands[0]) == GET_MODE (operands[1]) && reload_completed - && true_regnum (operands[0]) != true_regnum (operands[1])" + && REGNO (operands[0]) != REGNO (operands[1])" [(const_int 0)] { machine_mode mode = GET_MODE (operands[0]); @@ -10120,7 +10120,7 @@ (match_operand:QI 2 "const_int_operand")))) (clobber (reg:CC FLAGS_REG))] "TARGET_64BIT && reload_completed - && true_regnum (operands[0]) != true_regnum (operands[1])" + && REGNO (operands[0]) != REGNO (operands[1])" [(set (match_dup 0) (zero_extend:DI (mult:SI (match_dup 1) (match_dup 2))))] { @@ -17839,7 +17839,7 @@ (match_operand:SI 3 "immediate_operand")) (const_int 0)]))] "ix86_match_ccmode (insn, CCNOmode) - && (true_regnum (operands[2]) != AX_REG + && (REGNO (operands[2]) != AX_REG || satisfies_constraint_K (operands[3])) && peep2_reg_dead_p (1, operands[2])" [(parallel @@ -17860,7 +17860,7 @@ (const_int 0)]))] "! TARGET_PARTIAL_REG_STALL && ix86_match_ccmode (insn, CCNOmode) - && true_regnum (operands[2]) != AX_REG + && REGNO (operands[2]) != AX_REG && peep2_reg_dead_p (1, operands[2])" [(parallel [(set (match_dup 0) @@ -17881,7 +17881,7 @@ (const_int 0)]))] "! TARGET_PARTIAL_REG_STALL && ix86_match_ccmode (insn, CCNOmode) - && true_regnum (operands[2]) != AX_REG + && REGNO (operands[2]) != AX_REG && peep2_reg_dead_p (1, operands[2])" [(parallel [(set (match_dup 0) (match_op_dup 1