From patchwork Thu Nov 27 11:19:44 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 415455 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 575721401D0 for ; Thu, 27 Nov 2014 22:19:57 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; q=dns; s=default; b=O5xiZP4d4tUZLuYvH6MfsADOnnhQ1qyuMyw7n843NMG P/dD6nbwOAPqxQodJHon/yP6Lgy21B8BRNbQLDAuLO8xcOsa6LEDxeFUsiEeyjM4 jIka8JGaAlGz2xti0pFgmzysKFBOmml1ooIztkwNeUEBpeD/DO1Jthwsoa3GwbnQ = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; s=default; bh=ZzLv6qycBfZuBYjHJ+R6GRTae3M=; b=uWg+QQCUl4awMzpEW +Xh9R+HdAlddW91Bt6jx2HcOJwMg7h8frjLmi8U4kCHyE++0a3qkp/heLK3dQ9cQ 5iCO+G4OOZ7tC8x330TCWCBl7msW1vi1kxcJPsM6ysbPbHGYkzDA1qtWGtptcaBs RxJ/29S5OIggyP+z4rZK0c1QEU= Received: (qmail 9349 invoked by alias); 27 Nov 2014 11:19:50 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 9336 invoked by uid 89); 27 Nov 2014 11:19:49 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-lb0-f181.google.com Received: from mail-lb0-f181.google.com (HELO mail-lb0-f181.google.com) (209.85.217.181) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Thu, 27 Nov 2014 11:19:48 +0000 Received: by mail-lb0-f181.google.com with SMTP id 10so3884987lbg.40 for ; Thu, 27 Nov 2014 03:19:44 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.112.57.227 with SMTP id l3mr38518075lbq.68.1417087184867; Thu, 27 Nov 2014 03:19:44 -0800 (PST) Received: by 10.152.127.168 with HTTP; Thu, 27 Nov 2014 03:19:44 -0800 (PST) Date: Thu, 27 Nov 2014 12:19:44 +0100 Message-ID: Subject: [RFC PATCH, i386]: Prefer %ebx in set_got patterns From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" Cc: Vladimir Makarov , Evgeny Stupachenko , Jakub Jelinek Hello! Attached patch helps RA to choose the most appropriate PIC register by changing the register preference for set_got patterns. Using this patch, there should really be a reason for RA to avoid ABI mandated hard PIC reg. This patch avoids many mov %exx,%ebx in front of the calls, that happen with unpatched compiler even with Vladimir's latest RA patch to avoid duplicated PIC registers. As a smoke test, I have checked 32bit libgo.so.6.0.0 library, where now we have: [uros@omen7 .libs]$ grep thunk.bx aaa | wc -l 7693 [uros@omen7 .libs]$ grep thunk.ax aaa | wc -l 10 [uros@omen7 .libs]$ grep thunk.cx aaa | wc -l 4 [uros@omen7 .libs]$ grep thunk.dx aaa | wc -l 8 [uros@omen7 .libs]$ grep thunk.bp aaa | wc -l 497 [uros@omen7 .libs]$ grep thunk.si aaa | wc -l 145 [uros@omen7 .libs]$ grep thunk.di aaa | wc -l 198 2014-11-27 Uros Bizjak * config/i386/i386.md (set_got): Use "=b,?r" constraint for operand 0. (set_got_labelled): Ditto. (set_got_rex64): Ditto. (set_rip_rex64): Ditto. (set_got_offset_rex64): Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Thoughts? Uros Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 218111) +++ config/i386/i386.md (working copy) @@ -12101,7 +12101,7 @@ "ix86_expand_prologue (); DONE;") (define_insn "set_got" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "=b,?r") (unspec:SI [(const_int 0)] UNSPEC_SET_GOT)) (clobber (reg:CC FLAGS_REG))] "!TARGET_64BIT" @@ -12110,7 +12110,7 @@ (set_attr "length" "12")]) (define_insn "set_got_labelled" - [(set (match_operand:SI 0 "register_operand" "=r") + [(set (match_operand:SI 0 "register_operand" "=b,?r") (unspec:SI [(label_ref (match_operand 1))] UNSPEC_SET_GOT)) (clobber (reg:CC FLAGS_REG))] @@ -12120,7 +12120,7 @@ (set_attr "length" "12")]) (define_insn "set_got_rex64" - [(set (match_operand:DI 0 "register_operand" "=r") + [(set (match_operand:DI 0 "register_operand" "=b,?r") (unspec:DI [(const_int 0)] UNSPEC_SET_GOT))] "TARGET_64BIT" "lea{q}\t{_GLOBAL_OFFSET_TABLE_(%%rip), %0|%0, _GLOBAL_OFFSET_TABLE_[rip]}" @@ -12129,7 +12129,7 @@ (set_attr "mode" "DI")]) (define_insn "set_rip_rex64" - [(set (match_operand:DI 0 "register_operand" "=r") + [(set (match_operand:DI 0 "register_operand" "=b,?r") (unspec:DI [(label_ref (match_operand 1))] UNSPEC_SET_RIP))] "TARGET_64BIT" "lea{q}\t{%l1(%%rip), %0|%0, %l1[rip]}" @@ -12138,7 +12138,7 @@ (set_attr "mode" "DI")]) (define_insn "set_got_offset_rex64" - [(set (match_operand:DI 0 "register_operand" "=r") + [(set (match_operand:DI 0 "register_operand" "=b,?r") (unspec:DI [(label_ref (match_operand 1))] UNSPEC_SET_GOT_OFFSET))]