From patchwork Tue Jun 18 11:22:22 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 252237 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "localhost", Issuer "www.qmailtoaster.com" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 6619A2C0299 for ; Tue, 18 Jun 2013 21:22:37 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; q=dns; s=default; b=GGBBJF4ABctJ+jp1Bnv/sHI5D1Yk3wOIQN1unRLJLTK qUVdXXLbxFCAnzFXVsO437TB12ABKk2refIa6fQHhCKMQUIoy1PXiThQ1bGMHgVq c1xAaoFMSsy1sNeArP3SrkeRQb/xlawbWvE3LnM9W5NuqdtMHEIrR6s8k/oCZ1Wc = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; s=default; bh=3+gNYXBHTOFvIwEda5ibPUyBbBg=; b=Hq6CVFGm87NV8te0n r6BgCyK4AwhDCERndZ2BrkUvtlecJpIdC1CMjqOBtk//53jUW71nhqs1q7AH7eIl jOgrLQesleN3CUaGJ4p+HPwmlMznxXzuE9K/xcdjd3oL9lU86sD5HLBhc/q9Etl6 JdTdjhJlqZprKmjOyH/l+3U2F4= Received: (qmail 16238 invoked by alias); 18 Jun 2013 11:22:25 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 16218 invoked by uid 89); 18 Jun 2013 11:22:25 -0000 X-Spam-SWARE-Status: No, score=-2.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, RCVD_IN_HOSTKARMA_YE, SPF_PASS, TW_ZJ autolearn=ham version=3.3.1 X-Spam-User: qpsmtpd, 2 recipients Received: from mail-ob0-f181.google.com (HELO mail-ob0-f181.google.com) (209.85.214.181) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Tue, 18 Jun 2013 11:22:24 +0000 Received: by mail-ob0-f181.google.com with SMTP id 16so4351731obc.40 for ; Tue, 18 Jun 2013 04:22:22 -0700 (PDT) MIME-Version: 1.0 X-Received: by 10.60.38.10 with SMTP id c10mr11474479oek.58.1371554542475; Tue, 18 Jun 2013 04:22:22 -0700 (PDT) Received: by 10.182.52.234 with HTTP; Tue, 18 Jun 2013 04:22:22 -0700 (PDT) Date: Tue, 18 Jun 2013 13:22:22 +0200 Message-ID: Subject: [PATCH, libfortran]: Initialize result variable (+ other changes) From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" Cc: Fortran List , Tobias Burnus X-Virus-Found: No Hello! Attached patch initializes return variable in get_fpu_except_flags. Additionally, it uses __asm__ and __volatile__ consistently, as recommended for header files and unifies a bunch of formatting issues throughout the file. 2012-06-18 Uros Bizjak * config/fpu-387.h: Use __asm__ and __volatile__ consistently. (get_fpu_except_flags): Initialize result. Tested on x86_64-pc-linux-gnu {,-m32}. OK for mainline? Uros. Index: config/fpu-387.h =================================================================== --- config/fpu-387.h (revision 200163) +++ config/fpu-387.h (working copy) @@ -73,7 +73,7 @@ has_sse (void) /* We need a single SSE instruction here so the handler can safely skip over it. */ - __asm__ volatile ("movaps %xmm0,%xmm0"); + __asm__ __volatile__ ("movaps\t%xmm0,%xmm0"); sigaction (SIGILL, &oact, NULL); @@ -100,7 +100,7 @@ void set_fpu (void) { unsigned short cw; - asm volatile ("fnstcw %0" : "=m" (cw)); + __asm__ __volatile__ ("fnstcw\t%0" : "=m" (cw)); cw |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM | _FPU_MASK_UM | _FPU_MASK_PM); @@ -112,13 +112,13 @@ void set_fpu (void) if (options.fpe & GFC_FPE_UNDERFLOW) cw &= ~_FPU_MASK_UM; if (options.fpe & GFC_FPE_INEXACT) cw &= ~_FPU_MASK_PM; - asm volatile ("fldcw %0" : : "m" (cw)); + __asm__ __volatile__ ("fldcw\t%0" : : "m" (cw)); if (has_sse()) { unsigned int cw_sse; - asm volatile ("%vstmxcsr %0" : "=m" (cw_sse)); + __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse)); cw_sse &= 0xffff0000; cw_sse |= (_FPU_MASK_IM | _FPU_MASK_DM | _FPU_MASK_ZM | _FPU_MASK_OM @@ -131,7 +131,7 @@ void set_fpu (void) if (options.fpe & GFC_FPE_UNDERFLOW) cw_sse &= ~(_FPU_MASK_UM << 7); if (options.fpe & GFC_FPE_INEXACT) cw_sse &= ~(_FPU_MASK_PM << 7); - asm volatile ("%vldmxcsr %0" : : "m" (cw_sse)); + __asm__ __volatile__ ("%vldmxcsr\t%0" : : "m" (cw_sse)); } } @@ -139,7 +139,7 @@ void set_fpu (void) int get_fpu_except_flags (void) { - int result; + int result = 0; unsigned short cw; __asm__ __volatile__ ("fnstsw\t%0" : "=a" (cw)); @@ -147,27 +147,18 @@ get_fpu_except_flags (void) if (has_sse()) { unsigned int cw_sse; + __asm__ __volatile__ ("%vstmxcsr\t%0" : "=m" (cw_sse)); + cw |= cw_sse; } - if (cw & _FPU_MASK_IM) - result |= GFC_FPE_INVALID; + if (cw & _FPU_MASK_IM) result |= GFC_FPE_INVALID; + if (cw & _FPU_MASK_DM) result |= GFC_FPE_DENORMAL; + if (cw & _FPU_MASK_ZM) result |= GFC_FPE_ZERO; + if (cw & _FPU_MASK_OM) result |= GFC_FPE_OVERFLOW; + if (cw & _FPU_MASK_UM) result |= GFC_FPE_UNDERFLOW; + if (cw & _FPU_MASK_PM) result |= GFC_FPE_INEXACT; - if (cw & _FPU_MASK_ZM) - result |= GFC_FPE_ZERO; - - if (cw & _FPU_MASK_OM) - result |= GFC_FPE_OVERFLOW; - - if (cw & _FPU_MASK_UM) - result |= GFC_FPE_UNDERFLOW; - - if (cw & _FPU_MASK_DM) - result |= GFC_FPE_DENORMAL; - - if (cw & _FPU_MASK_PM) - result |= GFC_FPE_INEXACT; - return result; }