From patchwork Thu Apr 20 19:10:36 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 752966 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3w87kN45Thz9s76 for ; Fri, 21 Apr 2017 05:10:51 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="uBN+Foyr"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; q= dns; s=default; b=cHJ9uSmIohwuMCB3BbeA0nsJx9/Dj7y2IFgcgd2ZO1YDI7 tVk9IxfedWcOfysK54VFH6i+u3ji+WHfD/Oyrx25lqBlONeUbzT7ntM+1zbJ72RG BxcpjFrRDPGlvt/u2e0ZROusFgk6q9NsP8YKg+QsENDFSllxjeC17IJunTx4E= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:from:date:message-id:subject:to:content-type; s= default; bh=gh59UtItP79+TQM9krMShIIGqnE=; b=uBN+FoyrC4z2OIlegTo5 GcFwtoScSuKgQH31IuuX2KE4uVoIaqpygdnZDuafldUXK9Tv2KProj1mdQP9J/uv FTBai0fmZdb/IJgAsLjYb8vVcHddxOXaVtlChF9hPxHaRrywFjRnGVgJRGEtnOQj wmJ17X3lC2AVhitr+joj/Po= Received: (qmail 81476 invoked by alias); 20 Apr 2017 19:10:40 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 81447 invoked by uid 89); 20 Apr 2017 19:10:39 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-9.8 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE, RCVD_IN_SORBS_SPAM, SPF_PASS autolearn=ham version=3.3.2 spammy=H*c:sk:94eb2c1, hello! X-HELO: mail-ua0-f179.google.com Received: from mail-ua0-f179.google.com (HELO mail-ua0-f179.google.com) (209.85.217.179) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 20 Apr 2017 19:10:37 +0000 Received: by mail-ua0-f179.google.com with SMTP id f10so61206683uaa.2 for ; Thu, 20 Apr 2017 12:10:39 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=6q6O/KUG1vxDAmVzyzTyNXTb8UXV0rL8pU47buSPYfQ=; b=HOsoPDomC7RH9+7RNK1oxD4HHn2VvUNyY793k+p5f3dsWgYhaW4VRMQxYFK+epy87w 5F77BpoRSlFw7hk3vTZJdvvRQIpIxXf/70hBKylDkS2NuDE16bptP/sNr5ILYyFgt/+C o5AzIde643S3R/lnacSM4dFNi7yRUgqCw2aax87S/qCGliezuWJcGlN6VkZgDRbSjB4r y0mQhZldqZN4RMgw8aOFB8AwdU7vIaisOMWaRTTQHfR0t4bLZCjwe3LI4/9NK1EWHaFm w44M1ONlq3pRzq5v5harlk/tGA343eE0kkk7CqkDfOQaDJIOEimGSAzcDEUwQEtXVoET an8Q== X-Gm-Message-State: AN3rC/630usDKa/6QFoy3rOi6mCAoD4kw4RwkQ6UtJYJ9qn0BDTHL8QQ IyrdCjdsu/aW/JfKoEfGCC3syST6x6TE X-Received: by 10.159.39.196 with SMTP id b62mr4534063uab.108.1492715437645; Thu, 20 Apr 2017 12:10:37 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.49.206 with HTTP; Thu, 20 Apr 2017 12:10:36 -0700 (PDT) From: Uros Bizjak Date: Thu, 20 Apr 2017 21:10:36 +0200 Message-ID: Subject: [PATCH, i386]: Fix PR78090, GCC allows integer register for inter unit conversion under -mtune-ctrl=^inter_unit_conversions To: "gcc-patches@gcc.gnu.org" Hello! Attached patch makes TARGET_INTER_UNIT_CONVERSIONS setting more robust, by taking the same approach as handling of TARGET_INTER_UNIT_{TO,FROM}_VEC. The patch also removes now obsolete test that checked TARGET_INTER_UNIT_CONVERSIONS with tune_for_speed attribute, which is not case anymore. 2017-04-20 Uros Bizjak PR target/78090 * config/i386/constraints.md (Yc): New register constraint. * config/i386/i386.md (*float2_mixed): Use Yc constraint for alternative 2 of operand 0. Remove preferred_for_speed attribute. testsuite/ChangeLog: 2017-04-20 Uros Bizjak PR target/78090 * gcc.target/i386/conversion-2.c: Remove obsolete test. Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. Index: config/i386/constraints.md =================================================================== --- config/i386/constraints.md (revision 247026) +++ config/i386/constraints.md (working copy) @@ -99,6 +99,7 @@ ;; We use the Y prefix to denote any number of conditional register sets: ;; z First SSE register. +;; c SSE inter-unit conversions enabled ;; i SSE2 inter-unit moves to SSE register enabled ;; j SSE2 inter-unit moves from SSE register enabled ;; m MMX inter-unit moves to MMX register enabled @@ -117,6 +118,10 @@ (define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS" "First SSE register (@code{%xmm0}).") +(define_register_constraint "Yc" + "TARGET_SSE && TARGET_INTER_UNIT_CONVERSIONS ? ALL_SSE_REGS : NO_REGS" + "@internal Any SSE register, when SSE and inter-unit conversions are enabled.") + (define_register_constraint "Yi" "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES_TO_VEC ? ALL_SSE_REGS : NO_REGS" "@internal Any SSE register, when SSE2 and inter-unit moves to vector registers are enabled.") Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 247026) +++ config/i386/i386.md (working copy) @@ -5207,7 +5207,7 @@ }) (define_insn "*float2_mixed" - [(set (match_operand:MODEF 0 "register_operand" "=f,v,v") + [(set (match_operand:MODEF 0 "register_operand" "=f,Yc,v") (float:MODEF (match_operand:SWI48 1 "nonimmediate_operand" "m,r,m")))] "SSE_FLOAT_MODE_P (mode) && TARGET_SSE_MATH" @@ -5236,10 +5236,6 @@ && X87_ENABLE_FLOAT (mode, mode)") ] - (symbol_ref "true"))) - (set (attr "preferred_for_speed") - (cond [(eq_attr "alternative" "1") - (symbol_ref "TARGET_INTER_UNIT_CONVERSIONS")] (symbol_ref "true")))]) (define_insn "*float2_i387" Index: testsuite/gcc.target/i386/conversion-2.c =================================================================== --- testsuite/gcc.target/i386/conversion-2.c (revision 247026) +++ testsuite/gcc.target/i386/conversion-2.c (nonexistent) @@ -1,36 +0,0 @@ -/* { dg-do compile } */ -/* { dg-options "-O2 -fno-toplevel-reorder -mtune=bdver2" } */ -/* { dg-additional-options "-mregparm=1 -msse -mfpmath=sse" { target ia32 } } */ - -void __attribute__ ((hot)) -f1 (int x) -{ - register float f asm ("%xmm0") = x; - asm volatile ("" :: "x" (f)); -} - -void __attribute__ ((cold)) -f2 (int x) -{ - register float f asm ("%xmm1") = x; - asm volatile ("" :: "x" (f)); -} - -void __attribute__ ((hot)) -f3 (int x) -{ - register float f asm ("%xmm2") = x; - asm volatile ("" :: "x" (f)); -} - -void __attribute__ ((cold)) -f4 (int x) -{ - register float f asm ("%xmm3") = x; - asm volatile ("" :: "x" (f)); -} - -/* { dg-final { scan-assembler "sp\\\), %xmm0" } } */ -/* { dg-final { scan-assembler "(ax|di), %xmm1" } } */ -/* { dg-final { scan-assembler "sp\\\), %xmm2" } } */ -/* { dg-final { scan-assembler "(ax|di), %xmm3" } } */