diff mbox

[i386] : Extend TARGET_READ_MODIFY{,_WRITE} peepholes to all integer modes

Message ID CAFULd4Zwd7=zzi2Tfd2Bvy6B7Sfx2HFU3atF50rrAfRr-23F+A@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak April 29, 2016, 10:51 a.m. UTC
On Fri, Apr 29, 2016 at 12:17 PM, Eric Botcazou <ebotcazou@adacore.com> wrote:
>> I'm testing the attached patch. Does it fix your ada failures?
>
> No, it totally breaks stack checking. :-(

Eh, I was trying to be too clever.

Attached patch was actually tested on a couple of cases. It generates
the same assembly as before.

Uros.

Comments

Eric Botcazou April 29, 2016, 11:23 a.m. UTC | #1
> Attached patch was actually tested on a couple of cases. It generates
> the same assembly as before.

Note that you could just remove the second ":W" in the define_insn pattern.

That's better, but not quite it because this segfaults at -O2:

#0  memory_operand (op=0xabababababababab, mode=mode@entry=VOIDmode)
    at /home/eric/svn/gcc/gcc/recog.c:1360
#1  0x00000000014388b1 in get_attr_memory (insn=insn@entry=0x7ffff697b8c0)
    at /home/eric/svn/gcc/gcc/config/i386/i386.md:2120
#2  0x0000000001636fb8 in insn_default_latency_generic (insn=0x7ffff697b8c0)
    at /home/eric/svn/gcc/gcc/config/i386/i386.md:27394
#3  0x00000000017f9695 in insn_cost (insn=0x7ffff697b8c0)
    at /home/eric/svn/gcc/gcc/haifa-sched.c:1415
#4  0x00000000017feb75 in dep_cost_1 (link=link@entry=0x2e962e8, 
dw=dw@entry=0)
    at /home/eric/svn/gcc/gcc/haifa-sched.c:1468
#5  0x0000000001800d7a in dep_cost (link=0x2e962e8)
    at /home/eric/svn/gcc/gcc/haifa-sched.c:1523
#6  priority (insn=0x7ffff697b8c0) at /home/eric/svn/gcc/gcc/haifa-
sched.c:1674
#7  0x0000000001800e6f in set_priorities (head=<optimized out>, 
    tail=<optimized out>) at /home/eric/svn/gcc/gcc/haifa-sched.c:7209
#8  0x0000000000f689e3 in compute_priorities ()
    at /home/eric/svn/gcc/gcc/sched-rgn.c:3022
#9  0x0000000000f6bc46 in schedule_region (rgn=0)
    at /home/eric/svn/gcc/gcc/sched-rgn.c:3115
#10 schedule_insns () at /home/eric/svn/gcc/gcc/sched-rgn.c:3513
#11 0x0000000000f6c4de in schedule_insns ()

(gdb) frame 1
#1  0x00000000014388b1 in get_attr_memory (insn=insn@entry=0x7ffff697b8c0)
    at /home/eric/svn/gcc/gcc/config/i386/i386.md:2120
2120                   (match_test "TARGET_AVX")
(gdb) p debug_rtx(insn)
(insn 779 927 928 2 (parallel [
            (set (mem/v:DI (reg/f:DI 7 sp) [0  S8 A8])
                (unspec:DI [
                        (const_int 0 [0])
                    ] UNSPEC_PROBE_STACK))
            (clobber (reg:CC 17 flags))
        ]) c52104y.adb:57 1005 {probe_stack_di}
     (expr_list:REG_UNUSED (reg:CC 17 flags)
        (nil)))
$1 = void
diff mbox

Patch

Index: i386.md
===================================================================
--- i386.md	(revision 235620)
+++ i386.md	(working copy)
@@ -88,6 +88,7 @@ 
   UNSPEC_SET_GOT_OFFSET
   UNSPEC_MEMORY_BLOCKAGE
   UNSPEC_STACK_CHECK
+  UNSPEC_PROBE_STACK
 
   ;; TLS support
   UNSPEC_TP
@@ -17552,6 +17553,29 @@ 
   DONE;
 })
 
+(define_expand "probe_stack"
+  [(match_operand 0 "memory_operand")]
+  ""
+{
+  rtx (*insn) (rtx)
+    = (GET_MODE (operands[0]) == DImode
+       ? gen_probe_stack_di : gen_probe_stack_si);
+
+  emit_insn (insn (operands[0]));
+  DONE;
+})
+
+;; Use OR for stack probes, this is shorter.
+(define_insn "probe_stack_<mode>"
+  [(set (match_operand:W 0 "memory_operand" "=m")
+	(unspec:W [(const_int 0)] UNSPEC_PROBE_STACK))
+   (clobber (reg:CC FLAGS_REG))]
+  ""
+  "or{<imodesuffix>}\t{$0, %0|%0, 0}"
+  [(set_attr "type" "alu1")
+   (set_attr "mode" "<MODE>")
+   (set_attr "length_immediate" "1")])
+  
 (define_insn "adjust_stack_and_probe<mode>"
   [(set (match_operand:P 0 "register_operand" "=r")
 	(unspec_volatile:P [(match_operand:P 1 "register_operand" "0")]