From patchwork Mon May 4 11:53:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1282495 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=2620:52:3:1:0:246e:9693:128c; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=CRvCoGZg; dkim-atps=neutral Received: from sourceware.org (server2.sourceware.org [IPv6:2620:52:3:1:0:246e:9693:128c]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49G1Tf1xqwz9sP7 for ; Mon, 4 May 2020 21:53:39 +1000 (AEST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 2CD67383E81E; Mon, 4 May 2020 11:53:37 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 2CD67383E81E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1588593217; bh=xftFpr5rFoRlVte7PgfmgTs4pA2GXjw2opvQp+iBV/M=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=CRvCoGZgnBOvLiKd3hfL3UU6CaoYpQsEtWMMo4X6L4GvCnKrOleLiwvpgKBXZtIxI qg8og69TqSYoWQ86Zvhe7zcBzg+J0Sg3uUuE1AT7bhIH+cvgWGeTYIvgjm47qYS5Q7 6C5T5dqIEP8uLGdMmpS63FvQwxgicU3JKp5VqW2E= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-io1-xd2f.google.com (mail-io1-xd2f.google.com [IPv6:2607:f8b0:4864:20::d2f]) by sourceware.org (Postfix) with ESMTPS id 91DE8385DC0C for ; Mon, 4 May 2020 11:53:25 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org 91DE8385DC0C Received: by mail-io1-xd2f.google.com with SMTP id y26so11959198ioj.2 for ; Mon, 04 May 2020 04:53:25 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=xftFpr5rFoRlVte7PgfmgTs4pA2GXjw2opvQp+iBV/M=; b=K34bXzhZWO02bHITVkTvJJu7/Jo2ZxV8Vk5iIn1jWoRTwaw2CdV5tGDSWnwYxt0xIJ iT57dDyzlSeSxbC2dfGRF3vW0u9BOfT+r0CsrrXS4TVzmwrMrGRm+RpU68PUSlo/L3pP xB96u0xqrE8qh9Phg77kT3hDVfyLqafxqZd8kcgxOEqQ3M9aH8ch04X6OJNXulCXZwtE qtzF5ckSkhR/vnBk84mu7nZfSv8IwGSpwFBYPkNNhWZziRNiAxW9FEWo29CTFRyIOkgC Ex3tmKbKGKdvXf4a653Y+iIrSU+rFzcR/MghEWShycsgyRcTu0Wc6zW/rzpvLwBJcXvS r2nw== X-Gm-Message-State: AGi0PubXNee/A7NTjBm/Tjmick1n1QrWKoHHzbrbkBi5ez6oEb3vkyK3 CxqloN1srn16ls5clMklrZCdhEyQv6VVlFdL4qGOb/1tpaw= X-Google-Smtp-Source: APiQypKFK1n8+Ya96EkS/nyiLtn6cx8ETNrUi5gETh8BQSbRmaUDa4IOuvQ8bfuotLqka+aIbHHcDbqL737o5x6noP8= X-Received: by 2002:a6b:14d0:: with SMTP id 199mr15025141iou.11.1588593204828; Mon, 04 May 2020 04:53:24 -0700 (PDT) MIME-Version: 1.0 Date: Mon, 4 May 2020 13:53:13 +0200 Message-ID: Subject: [committed] i386: Use SHR to compare with large power-of-two constants [PR94650] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-18.5 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, LOTS_OF_MONEY, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Convert unsigned compares where m >= LARGE_POWER_OF_TWO and LARGE_POWER_OF_TWO represent an immediate where bit 33+ is set to use a SHR instruction and compare the result to 0. This avoids loading a large immediate with MOVABS insn. movabsq $1099511627775, %rax cmpq %rax, %rdi ja .L5 gets converted to: shrq $40, %rdi jne .L5 2020-05-04 Uroš Bizjak PR target/94650 * config/i386/predicates.md (shr_comparison_operator): New predicate. * config/i386/i386.md (compare->shr splitter): New splitters. testsuite/ChangeLog: 2020-05-04 Uroš Bizjak PR target/94650 * gcc.targeti/i386/pr94650.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 6f3ac3ad555..bd144ab3d5e 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -12310,6 +12310,36 @@ ;; Store-flag instructions. +(define_split + [(set (match_operand:QI 0 "nonimmediate_operand") + (match_operator:QI 1 "shr_comparison_operator" + [(match_operand:DI 2 "register_operand") + (match_operand 3 "const_int_operand")]))] + "TARGET_64BIT + && IN_RANGE (exact_log2 (UINTVAL (operands[3]) + 1), 32, 63)" + [(parallel + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (lshiftrt:DI (match_dup 2) (match_dup 4)) + (const_int 0))) + (clobber (scratch:DI))]) + (set (match_dup 0) + (match_op_dup 1 [(reg:CCZ FLAGS_REG) (const_int 0)]))] +{ + enum rtx_code new_code; + + operands[1] = shallow_copy_rtx (operands[1]); + switch (GET_CODE (operands[1])) + { + case GTU: new_code = NE; break; + case LEU: new_code = EQ; break; + default: gcc_unreachable (); + } + PUT_CODE (operands[1], new_code); + + operands[4] = GEN_INT (exact_log2 (UINTVAL (operands[3]) + 1)); +}) + ;; For all sCOND expanders, also expand the compare or test insn that ;; generates cc0. Generate an equality comparison if `seq' or `sne'. @@ -12473,6 +12503,42 @@ (set_attr "mode" "")]) ;; Basic conditional jump instructions. + +(define_split + [(set (pc) + (if_then_else + (match_operator 1 "shr_comparison_operator" + [(match_operand:DI 2 "register_operand") + (match_operand 3 "const_int_operand")]) + (label_ref (match_operand 0)) + (pc)))] + "TARGET_64BIT + && IN_RANGE (exact_log2 (UINTVAL (operands[3]) + 1), 32, 63)" + [(parallel + [(set (reg:CCZ FLAGS_REG) + (compare:CCZ + (lshiftrt:DI (match_dup 2) (match_dup 4)) + (const_int 0))) + (clobber (scratch:DI))]) + (set (pc) + (if_then_else (match_op_dup 1 [(reg:CCZ FLAGS_REG) (const_int 0)]) + (label_ref (match_operand 0)) + (pc)))] +{ + enum rtx_code new_code; + + operands[1] = shallow_copy_rtx (operands[1]); + switch (GET_CODE (operands[1])) + { + case GTU: new_code = NE; break; + case LEU: new_code = EQ; break; + default: gcc_unreachable (); + } + PUT_CODE (operands[1], new_code); + + operands[4] = GEN_INT (exact_log2 (UINTVAL (operands[3]) + 1)); +}) + ;; We ignore the overflow flag for signed branch instructions. (define_insn "*jcc" diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 71f4cb1193c..1a5e2210eca 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1290,6 +1290,9 @@ (define_predicate "bt_comparison_operator" (match_code "ne,eq")) +(define_predicate "shr_comparison_operator" + (match_code "gtu,leu")) + ;; Return true if OP is a valid comparison operator in valid mode. (define_predicate "ix86_comparison_operator" (match_operand 0 "comparison_operator") diff --git a/gcc/testsuite/gcc.target/i386/pr94650.c b/gcc/testsuite/gcc.target/i386/pr94650.c new file mode 100644 index 00000000000..49d8b6e7f8c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr94650.c @@ -0,0 +1,30 @@ +/* PR target/94650 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2" } */ + +#define LARGE_POWER_OF_TWO (1ULL << 40) + +int +check (unsigned long long m) +{ + return m >= LARGE_POWER_OF_TWO; +} + +void g (int); + +void +test0 (unsigned long long m) +{ + if (m >= LARGE_POWER_OF_TWO) + g (0); +} + +void +test1 (unsigned long long m) +{ + if (m >= LARGE_POWER_OF_TWO) + g (m); +} + +/* { dg-final { scan-assembler-not "movabs" } } */ +/* { dg-final { scan-assembler-times "shr" 3 } } */