===================================================================
@@ -14,8 +14,13 @@
#include "config/i386/32/sfp-machine.h"
#endif
-#define _FP_KEEPNANFRACP 1
+#define _FP_KEEPNANFRACP 1
+#define _FP_NANSIGN_S 1
+#define _FP_NANSIGN_D 1
+#define _FP_NANSIGN_E 1
+#define _FP_NANSIGN_Q 1
+
/* Here is something Intel misdesigned: the specs don't define
the case where we have two NaNs with same mantissas, but
different sign. Different operations pick up different NaNs. */
@@ -42,13 +47,11 @@
#define FP_EX_UNDERFLOW 0x10
#define FP_EX_INEXACT 0x20
-#define FP_EX_MASK 0x3f
-
void __sfp_handle_exceptions (int);
#define FP_HANDLE_EXCEPTIONS \
do { \
- if (_fex & FP_EX_MASK) \
+ if (_fex) \
__sfp_handle_exceptions (_fex); \
} while (0);
@@ -57,15 +60,17 @@
#define FP_RND_PINF 0x800
#define FP_RND_MINF 0x400
+#define FP_RND_MASK 0xc00
+
#define _FP_DECL_EX \
unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST
-#define FP_INIT_ROUNDMODE \
- do { \
- __asm__ ("fnstcw %0" : "=m" (_fcw)); \
+#define FP_INIT_ROUNDMODE \
+ do { \
+ __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \
} while (0)
-#define FP_ROUNDMODE (_fcw & 0xc00)
+#define FP_ROUNDMODE (_fcw & FP_RND_MASK)
#define __LITTLE_ENDIAN 1234
#define __BIG_ENDIAN 4321
===================================================================
@@ -76,7 +76,3 @@
16byte since soft-fp emulation is done in 16byte. */
#define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0
#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0
-#define _FP_NANSIGN_S 1
-#define _FP_NANSIGN_D 1
-#define _FP_NANSIGN_E 1
-#define _FP_NANSIGN_Q 1
===================================================================
@@ -17,7 +17,3 @@
#define _FP_NANFRAC_D _FP_QNANBIT_D
#define _FP_NANFRAC_E _FP_QNANBIT_E, 0
#define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0
-#define _FP_NANSIGN_S 1
-#define _FP_NANSIGN_D 1
-#define _FP_NANSIGN_E 1
-#define _FP_NANSIGN_Q 1