From patchwork Sun Nov 16 09:36:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 411265 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9F62C1400DE for ; Sun, 16 Nov 2014 20:36:43 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; q=dns; s=default; b=MoUlp8LdyHaq+W0td4TxKm0iW2XLyPpuDzkR3mFw2jN cOfCEpNNFqlbn0dtFSXepVRH6GO7wdL9gpgJ54Mfrz94JPzRcnH/WrtHa0uwPffe ua8nIyo+ShBxZHg5ArB36rdDpqyR1iEN6gRM1Gc5QulWqfuF7JkJ2GAcQ0G5ao9w = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; s=default; bh=mDuLXOwLgFWLwRgC76skabMr7lo=; b=ZkJrR5EHzCq0kl7YB RXwlM7As4SuC42tjwpZ3ovRP3JvJeSNb0S53T/c1SMVZiVT1Xr4LHKb1QtJh0yYV inECfWPRldMS5nGIDxfL1rrVI3T1WOH+F2U3szxu6G7C1yJGUm3M1XlUP4YJu1j9 Mu9EJgvLLd6tmKNV0j/Vk7jQ68= Received: (qmail 6599 invoked by alias); 16 Nov 2014 09:36:36 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 6581 invoked by uid 89); 16 Nov 2014 09:36:35 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.4 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-la0-f53.google.com Received: from mail-la0-f53.google.com (HELO mail-la0-f53.google.com) (209.85.215.53) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Sun, 16 Nov 2014 09:36:33 +0000 Received: by mail-la0-f53.google.com with SMTP id pn19so60454lab.12 for ; Sun, 16 Nov 2014 01:36:30 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.112.41.168 with SMTP id g8mr18606072lbl.59.1416130590167; Sun, 16 Nov 2014 01:36:30 -0800 (PST) Received: by 10.152.163.227 with HTTP; Sun, 16 Nov 2014 01:36:29 -0800 (PST) Date: Sun, 16 Nov 2014 10:36:29 +0100 Message-ID: Subject: [PATCH, sh]: Use std::swap From: Uros Bizjak To: "gcc-patches@gcc.gnu.org" Cc: Kaz Kojima , Oleg Endo Hello! 2014-11-16 Uros Bizjak * config/sh/sh.c: Do not include algorithm. (sh_emit_scc_to_t): Replace open-coded swap with std::swap to swap values. (sh_emit_compare_and_branch): Ditto. (sh_emit_compare_and_set): Ditto. * config/sh/sh.md (replacement peephole2): Ditto. (cstore4_media): Ditto. (*fmasf4): Ditto. Tested by building a crosscompiler to sh-elf, otherwise untested. Uros. Index: sh.c =================================================================== --- sh.c (revision 217624) +++ sh.c (working copy) @@ -21,7 +21,6 @@ along with GCC; see the file COPYING3. If not see #include #include -#include #include "config.h" #include "system.h" @@ -2351,11 +2350,7 @@ sh_emit_scc_to_t (enum rtx_code code, rtx op0, rtx break; } if (code != oldcode) - { - rtx tmp = op0; - op0 = op1; - op1 = tmp; - } + std::swap (op0, op1); mode = GET_MODE (op0); if (mode == VOIDmode) @@ -2436,7 +2431,7 @@ sh_emit_compare_and_branch (rtx *operands, machine enum rtx_code branch_code; rtx op0 = operands[1]; rtx op1 = operands[2]; - rtx insn, tem; + rtx insn; bool need_ccmpeq = false; if (TARGET_SH2E && GET_MODE_CLASS (mode) == MODE_FLOAT) @@ -2461,7 +2456,7 @@ sh_emit_compare_and_branch (rtx *operands, machine || (code == LE && TARGET_IEEE && TARGET_SH2E) || (code == GE && !(TARGET_IEEE && TARGET_SH2E))) { - tem = op0, op0 = op1, op1 = tem; + std::swap (op0, op1); code = swap_condition (code); } @@ -2520,7 +2515,6 @@ sh_emit_compare_and_set (rtx *operands, machine_mo rtx op1 = operands[3]; rtx_code_label *lab = NULL; bool invert = false; - rtx tem; op0 = force_reg (mode, op0); if ((code != EQ && code != NE @@ -2534,8 +2528,8 @@ sh_emit_compare_and_set (rtx *operands, machine_mo { if (code == LT || code == LE) { + std::swap (op0, op1); code = swap_condition (code); - tem = op0, op0 = op1, op1 = tem; } if (code == GE) { Index: sh.md =================================================================== --- sh.md (revision 217624) +++ sh.md (working copy) @@ -1618,14 +1618,9 @@ extract_insn (insn2); if (! constrain_operands (1, get_preferred_alternatives (insn2, bb))) { - rtx tmp; failure: - tmp = replacements[0]; - replacements[0] = replacements[1]; - replacements[1] = tmp; - tmp = replacements[2]; - replacements[2] = replacements[3]; - replacements[3] = tmp; + std::swap (replacements[0], replacements[1]); + std::swap (replacements[2], replacements[3]); replace_n_hard_rtx (SET_DEST (set1), replacements, 2, 1); replace_n_hard_rtx (SET_DEST (set2), replacements, 2, 1); replace_n_hard_rtx (SET_SRC (set2), replacements, 2, 1); @@ -11348,9 +11343,7 @@ label: if (swap) { - rtx tem = operands[2]; - operands[2] = operands[3]; - operands[3] = tem; + std::swap (operands[2], operands[3]); code = swap_condition (code); } @@ -12538,11 +12531,7 @@ label: /* Change 'b * a + a' into 'a * b + a'. This is better for register allocation. */ if (REGNO (operands[2]) == REGNO (operands[3])) - { - rtx tmp = operands[1]; - operands[1] = operands[2]; - operands[2] = tmp; - } + std::swap (operands[1], operands[2]); } [(set_attr "type" "fp") (set_attr "fp_mode" "single")])