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Slightly improve TARGET_STV splitters (PR target/70321)

Message ID CAFULd4ZFLDhQ8ON2nB1JHi=qdFPObUHpZ_k3KF9fdcFDdDCzbw@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak March 24, 2016, 2:03 p.m. UTC 
On Wed, Mar 23, 2016 at 8:35 AM, Uros Bizjak <ubizjak@gmail.com> wrote:
> On Tue, Mar 22, 2016 at 10:37 PM, Jakub Jelinek <jakub@redhat.com> wrote:
>> Hi!
>>
>> As the PR mentions, DImode AND/IOR/XOR patterns often result in too ugly
>> code, regression from when the patterns weren't there (before STV has been
>> added).  This patch attempts to improve it a little bit by improving the
>> splitter for these, rather than always generating two SImode AND/IOR/XOR
>> instructions, if the last operand's subword is either 0 or -1, optimize
>> the corresponding instruction in the pair to nothing, or to clearing, or
>> negation.  More improvement can be IMHO only achieved by moving the STV
>> pass before combiner and split patterns we don't adjust into vector patterns
>> into corresponding SImode patterns, so that the combiner can handle them,
>> but that sounds like stage1 material.

Following patch fixes:

FAIL: gcc.c-torture/execute/bitfld-3.c   -O1  (internal compiler error)
FAIL: gcc.c-torture/execute/bitfld-3.c   -O1  (test for excess errors)

We should not expand post reload via gen_andsi3, since we can generate
movzbl with unsupported QImode register.

2016-03-24  Uros Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.md (*anddi3_doubleword): Generate AND insn
    using ix86_expand_binary_operator instead of gen_andsi3.

Bootstrap and regression test in process, will commit the patch when
regtest finish.

Uros.
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Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 51e9a6e..339a134 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -8154,7 +8154,7 @@ 
       ix86_expand_move (SImode, &operands[0]);
     }
   else if (operands[2] != constm1_rtx)
-    emit_insn (gen_andsi3 (operands[0], operands[1], operands[2]));
+    ix86_expand_binary_operator (AND, SImode, &operands[0]);
   else if (operands[5] == constm1_rtx)
     emit_note (NOTE_INSN_DELETED);
   if (operands[5] == const0_rtx)
@@ -8163,7 +8163,7 @@ 
       ix86_expand_move (SImode, &operands[3]);
     }
   else if (operands[5] != constm1_rtx)
-    emit_insn (gen_andsi3 (operands[3], operands[4], operands[5]));
+    ix86_expand_binary_operator (AND, SImode, &operands[3]);
   DONE;
 })