From patchwork Thu Nov 26 08:52:30 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 1406488 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org (client-ip=8.43.85.97; helo=sourceware.org; envelope-from=gcc-patches-bounces@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=gcc.gnu.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.a=rsa-sha256 header.s=default header.b=xCzRNZyP; dkim-atps=neutral Received: from sourceware.org (unknown [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4ChWjx3zzVz9sSs for ; Thu, 26 Nov 2020 19:52:51 +1100 (AEDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C91C7396E44E; Thu, 26 Nov 2020 08:52:48 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C91C7396E44E DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gcc.gnu.org; s=default; t=1606380768; bh=vapwWT+Q47e0VLSL7YQ0DZ3pELC5O5VBflsAutq/Jl8=; h=Date:Subject:To:List-Id:List-Unsubscribe:List-Archive:List-Post: List-Help:List-Subscribe:From:Reply-To:From; b=xCzRNZyPGgSdxILyzkVq6IqrK6RvrXnPiRzPnjQY7UM39Wa97mG8/BeAKJz36Dgw7 HkjjkoyVVw9oEECca0xBpQ3656QsrMqyUFULSeg3ZxgBe2EIB06UDaWirXo1cD5h5l TMyFYqEQkG0bmtxMhqCz42rc7oLrG8sQkCGNdG7c= X-Original-To: gcc-patches@gcc.gnu.org Delivered-To: gcc-patches@gcc.gnu.org Received: from mail-qk1-x729.google.com (mail-qk1-x729.google.com [IPv6:2607:f8b0:4864:20::729]) by sourceware.org (Postfix) with ESMTPS id DD244396E43D for ; Thu, 26 Nov 2020 08:52:45 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org DD244396E43D Received: by mail-qk1-x729.google.com with SMTP id y197so958236qkb.7 for ; Thu, 26 Nov 2020 00:52:45 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:from:date:message-id:subject:to; bh=vapwWT+Q47e0VLSL7YQ0DZ3pELC5O5VBflsAutq/Jl8=; b=psq6/+Unu5tmu0+z8QoIQM3ViZKjQfYaD/smAHbB8GMi7K/1WV5zsoVTwCTRDJLEIZ 1AvIN0Iz5CUMPcmP/UnsZR+2rcsMV+U0Iw5D3N0S1uxiEsyJvKQP0rpXN5pmpp4jMwHQ gAhl2ggpmqzSXwKIicrNxFqiIcH/gPEzSHm7OgyjHNQJgkHVIN9bm7xK06WD5kUeZZob /kF2cA+VTxw26ilQbuSZUz9BYrGDvNv3H02lUh3qR9p7KK6v1LuvlXUOcCcUS7wUcygM JAJPVA2kmsN3krHnrzyEBstZSD6Veo9fOJyTbDIx532ECVkJ5NjlwE9J9Ex37ztkPs33 plgw== X-Gm-Message-State: AOAM532zaZ9neqtTw8Q9+3Xrg6CraZ/Zkm4MMcCNHGdHKGHQ2ai4P8yt JkEpbc5ayUtUyiNEgufTeg+ZUxitvvF4j1j6gsQdW1fENnxfzQ== X-Google-Smtp-Source: ABdhPJxvPCMqvR9zaPYl05D7IA0aLcw3oDbNHK4DsfkfkWE9SfWrRIT0gVmP44ZeqS1816iDbPMHAxu7WzEBZQTPkkg= X-Received: by 2002:a05:620a:1655:: with SMTP id c21mr2122841qko.127.1606380765267; Thu, 26 Nov 2020 00:52:45 -0800 (PST) MIME-Version: 1.0 Date: Thu, 26 Nov 2020 09:52:30 +0100 Message-ID: Subject: i386: Use SDWIM mode iterator for abs and maxmin [PR97873] To: "gcc-patches@gcc.gnu.org" X-Spam-Status: No, score=-9.7 required=5.0 tests=BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, FREEMAIL_FROM, GIT_PATCH_0, RCVD_IN_DNSWL_NONE, SPF_HELO_NONE, SPF_PASS, TXREP autolearn=ham autolearn_force=no version=3.4.2 X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on server2.sourceware.org X-BeenThere: gcc-patches@gcc.gnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gcc-patches mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-Patchwork-Original-From: Uros Bizjak via Gcc-patches From: Uros Bizjak Reply-To: Uros Bizjak Errors-To: gcc-patches-bounces@gcc.gnu.org Sender: "Gcc-patches" Generate special double mode sequence also for QImode and HImode. Without QImode and HImode patterns, middle-end extends operands to SImode and emits SImode conditional move instruction with paradoxical SImode output register. This form is not recognized by STV pass, but a single abs with input operand in a register would not be converted anyway due to relatively high register conversion cost. 2020-11-26 Uroš Bizjak PR target/97873 gcc/ * config/i386/i386.md (abs2): Use SDWIM mode iterator. (*abs2_1): Use SWI mode iterator. (3): Use SDWIM mode iterator. (*3_1): Use SWI mode iterator. gcc/testsuite/ * gcc.target/i386/pr97873-3.c: New test. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to mainline. Uros. diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 943a1c98a39..7c25ae2078d 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -10180,9 +10180,9 @@ (define_expand "abs2" [(parallel - [(set (match_operand:SWI48DWI 0 "register_operand") - (abs:SWI48DWI - (match_operand:SWI48DWI 1 "general_operand"))) + [(set (match_operand:SDWIM 0 "register_operand") + (abs:SDWIM + (match_operand:SDWIM 1 "general_operand"))) (clobber (reg:CC FLAGS_REG))])] "TARGET_CMOVE" { @@ -10252,9 +10252,9 @@ }) (define_insn_and_split "*abs2_1" - [(set (match_operand:SWI48 0 "register_operand") - (abs:SWI48 - (match_operand:SWI48 1 "general_operand"))) + [(set (match_operand:SWI 0 "register_operand") + (abs:SWI + (match_operand:SWI 1 "general_operand"))) (clobber (reg:CC FLAGS_REG))] "TARGET_CMOVE && ix86_pre_reload_split ()" @@ -10263,12 +10263,12 @@ [(parallel [(set (reg:CCGOC FLAGS_REG) (compare:CCGOC - (neg:SWI48 (match_dup 1)) + (neg:SWI (match_dup 1)) (const_int 0))) (set (match_dup 2) - (neg:SWI48 (match_dup 1)))]) + (neg:SWI (match_dup 1)))]) (set (match_dup 0) - (if_then_else:SWI48 + (if_then_else:SWI (ge (reg:CCGOC FLAGS_REG) (const_int 0)) (match_dup 2) (match_dup 1)))] @@ -18967,10 +18967,10 @@ (define_expand "3" [(parallel - [(set (match_operand:SWI48DWI 0 "register_operand") - (maxmin:SWI48DWI - (match_operand:SWI48DWI 1 "register_operand") - (match_operand:SWI48DWI 2 "general_operand"))) + [(set (match_operand:SDWIM 0 "register_operand") + (maxmin:SDWIM + (match_operand:SDWIM 1 "register_operand") + (match_operand:SDWIM 2 "general_operand"))) (clobber (reg:CC FLAGS_REG))])] "TARGET_CMOVE") @@ -19033,17 +19033,17 @@ }) (define_insn_and_split "*3_1" - [(set (match_operand:SWI48 0 "register_operand") - (maxmin:SWI48 - (match_operand:SWI48 1 "register_operand") - (match_operand:SWI48 2 "general_operand"))) + [(set (match_operand:SWI 0 "register_operand") + (maxmin:SWI + (match_operand:SWI 1 "register_operand") + (match_operand:SWI 2 "general_operand"))) (clobber (reg:CC FLAGS_REG))] "TARGET_CMOVE && ix86_pre_reload_split ()" "#" "&& 1" [(set (match_dup 0) - (if_then_else:SWI48 (match_dup 3) + (if_then_else:SWI (match_dup 3) (match_dup 1) (match_dup 2)))] { diff --git a/gcc/testsuite/gcc.target/i386/pr97873-3.c b/gcc/testsuite/gcc.target/i386/pr97873-3.c new file mode 100644 index 00000000000..e682f14c87c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr97873-3.c @@ -0,0 +1,27 @@ +/* PR target/97873 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2 -mno-sse3 -mtune=generic" } */ + +short test_absw (short x) +{ + return (x < 0) ? -x : x; +} + +short test_sminw (short x, short y) +{ + return (x < y) ? x : y; +} + +/* { dg-final { scan-assembler-not "movswl" } } */ + +char test_absb (char x) +{ + return (x < 0) ? -x : x; +} + +char test_sminb (char x, char y) +{ + return (x < y) ? x : y; +} + +/* { dg-final { scan-assembler-not "movsbl" } } */