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[i386] Fix PR 64688, ICE: Max. number of generated reload insns per insn is achieved (90)

Message ID CAFULd4YPOCo17=6mWi2t0uLGAwC0MKY9k5vuF9kkTYkEsdEBgw@mail.gmail.com
State New
Headers show

Commit Message

Uros Bizjak Jan. 22, 2015, 6:37 p.m. UTC 
On Thu, Jan 22, 2015 at 3:41 PM, Uros Bizjak <ubizjak@gmail.com> wrote:

> Attached patch fixes PR 64688. Operand constraints were wrong for
> reg-to-vec targets.
>
> The patch also fixes PR 64477.

Whoops, I have regtested wrong compiler. The patch introduced some
AVX2 regressions. Following patch is also needed, otherwise vec_dup
post-reload splitter creates invalid pattern that involves general reg
for reg-to-vec targets.

--cut here--
--cut here--

Sorry for the breakage, will be fixed ASAP.

Uros.
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Patch

Index: config/i386/sse.md
===================================================================
--- config/i386/sse.md  (revision 220004)
+++ config/i386/sse.md  (working copy)
@@ -16711,7 +16711,7 @@ 
   [V32QI V16QI V16HI V8HI V8SI V4SI])

 (define_insn "*vec_dup<mode>"
-  [(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand" "=x,x,x")
+  [(set (match_operand:AVX2_VEC_DUP_MODE 0 "register_operand" "=x,x,Yi")
        (vec_duplicate:AVX2_VEC_DUP_MODE
          (match_operand:<ssescalarmode> 1 "nonimmediate_operand" "m,x,$r")))]
   "TARGET_AVX2"