@@ -8518,7 +8518,7 @@ (define_insn_and_split "*udivmodsi4_pow2_zext_1"
(umod:SI (match_dup 2) (match_dup 3)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT
- && exact_log2 (UINTVAL (operands[3])) > 0"
+ && IN_RANGE (exact_log2 (UINTVAL (operands[3])), 1, 31)"
"#"
"&& reload_completed"
[(set (match_dup 1) (match_dup 2))
@@ -8599,10 +8599,10 @@ (define_insn_and_split "*udivmodsi4_pow2_zext_2"
(umod:SI (match_operand:SI 2 "register_operand" "0")
(match_operand:SI 3 "const_int_operand" "n"))))
(set (match_operand:SI 0 "register_operand" "=r")
- (umod:SI (match_dup 2) (match_dup 3)))
+ (udiv:SI (match_dup 2) (match_dup 3)))
(clobber (reg:CC FLAGS_REG))]
"TARGET_64BIT
- && exact_log2 (UINTVAL (operands[3])) > 0"
+ && IN_RANGE (exact_log2 (UINTVAL (operands[3])), 1, 31)"
"#"
"&& reload_completed"
[(set (match_dup 1) (match_dup 2))
In addition to the obvious cut-n-pasto where *udivmodsi4_pow2_zext_2 never matches, limit the range of the immediate operand to prevent out of range immediate operand of AND instruction. Found by inspection, the patterns rarely match (if at all), since tree optimizers do the transformation before RTL is generated. But according to the comment above *udivmod<mode>4_pow2, the constant can materialize after expansion, so leave these patterns around for now. 2021-07-09 Uroš Bizjak <ubizjak@gmail.com> gcc/ * config/i386/i386.md (*udivmodsi4_pow2_zext_1): Limit the log2 range of operands[3] to [1,31]. (*udivmodsi4_pow2_zext_2): Ditto. Correct insn RTX pattern. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Pushed to master. Uros.