From patchwork Fri Nov 8 17:19:41 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 289895 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A127C2C00CD for ; Sat, 9 Nov 2013 04:26:41 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; q=dns; s=default; b=xzJVcpLW+2Fn6aMUo/vh2bHXGvq1+cNZ+ZaTpWR340U 5ZG/lt/DOAiNEj+c/aRCFRv995++mSpD4gICb4+sVgHR3eydxMW/bnYMatW+KCfT sP6O3hte/bGv8fdYU8sWfEtR1DNcO+iBbW8GlGtfsl5KMDiEx51lp0kufRcrY5FQ = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:date:message-id:subject:from:to:cc:content-type; s=default; bh=S6M7sZB+hpl92pEAzU2uIvxGnEs=; b=dnXOkpv+7ASlQ8UEP 9ybvZLyyPHij4grdcF9PZM2ZrHJ5PJ+3yGZjMVhtLKgwZrlqiSKJESM2UqJp3cqK BLasO3HZv37bxStKFS6BPqym42AbizUyHRMKmJwMcVSSSWYw43BsR+jCTznuSBmD jrgYXCWdrwygizBiZgyTi4AcWc= Received: (qmail 5145 invoked by alias); 8 Nov 2013 17:24:11 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 25386 invoked by uid 89); 8 Nov 2013 17:19:53 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.4 required=5.0 tests=AWL, BAYES_50, FREEMAIL_FROM, RDNS_NONE, SPF_PASS, URIBL_BLOCKED autolearn=no version=3.3.2 X-HELO: mail-ob0-f170.google.com Received: from Unknown (HELO mail-ob0-f170.google.com) (209.85.214.170) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Fri, 08 Nov 2013 17:19:52 +0000 Received: by mail-ob0-f170.google.com with SMTP id gq1so1785588obb.29 for ; Fri, 08 Nov 2013 09:19:44 -0800 (PST) MIME-Version: 1.0 X-Received: by 10.182.149.168 with SMTP id ub8mr786869obb.74.1383931184202; Fri, 08 Nov 2013 09:19:44 -0800 (PST) Received: by 10.182.137.136 with HTTP; Fri, 8 Nov 2013 09:19:41 -0800 (PST) Date: Fri, 8 Nov 2013 18:19:41 +0100 Message-ID: Subject: [PATCH, libatomic]: Add config/x86/fenv.c From: Uros Bizjak To: "Joseph S. Myers" Cc: Jakub Jelinek , "gcc-patches@gcc.gnu.org" , Andrew MacLeod , Mike Stump , stanshebs@earthlink.net, Jason Merrill , Richard Henderson , "jh@suse.cz" On Fri, Nov 8, 2013 at 2:13 PM, Joseph S. Myers wrote: >> Can we introduce a target-dependant source here, in the same way as > > Sure, that seems a reasonable thing to do. I think putting a file fenv.c > in an appropriate subdirectory of libatomic/config will result in it being > found automatically by the existing search path logic, but you'll need to > test that. Attached is the x86 optimized implementation of fenv.c. The source depends as little as possible on fenv.h definitions - these are defined by hardware, and for sure won't change soon in hardware-dependant file. 2013-11-08 Uros Bizjak * config/x86/fenv.c: New file. Bootstrapped and regression tested on x86_64-pc-linux-gnu {,-m32}. The testing of atomics currently fails on 32bit target due to missing __atomic_{load,store}_16 functions, so the patch is not adequately tested yet. Yes, I have tested that the libatomic's auto-configuration logic works ;) Uros. Index: ChangeLog =================================================================== --- ChangeLog (revision 204574) +++ ChangeLog (working copy) @@ -1,3 +1,7 @@ +2013-11-08 Uros Bizjak + + * config/x86/fenv.c: New file. + 2013-11-07 Joseph Myers * fenv.c: New file. Index: config/x86/fenv.c =================================================================== --- config/x86/fenv.c (revision 0) +++ config/x86/fenv.c (working copy) @@ -0,0 +1,115 @@ +/* Copyright (C) 2013 Free Software Foundation, Inc. + + This file is part of the GNU Atomic Library (libatomic). + + Libatomic is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + Libatomic is distributed in the hope that it will be useful, but WITHOUT ANY + WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS + FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#include "libatomic_i.h" + +#ifdef HAVE_FENV_H +# include +#endif + +struct fenv +{ + unsigned short int __control_word; + unsigned short int __unused1; + unsigned short int __status_word; + unsigned short int __unused2; + unsigned short int __tags; + unsigned short int __unused3; + unsigned int __eip; + unsigned short int __cs_selector; + unsigned int __opcode:11; + unsigned int __unused4:5; + unsigned int __data_offset; + unsigned short int __data_selector; + unsigned short int __unused5; +}; + +/* Raise the supported floating-point exceptions from EXCEPTS. Other + bits in EXCEPTS are ignored. */ + +void +__atomic_feraiseexcept (int excepts __attribute__ ((unused))) +{ +#ifdef FE_INVALID + if (excepts & FE_INVALID) + { + float f = 0.0f; +#ifdef __x86_64__ + volatile float r __attribute__ ((unused)); + asm volatile ("%vdivss\t{%0, %d0|%d0, %0}" : "+x" (f)); + r = f; /* Needed to trigger exception. */ +#else + asm volatile ("fdiv\t{%y0, %0|%0, %y0}" : "+t" (f)); + /* No need for fwait, exception is triggered by emitted fstp. */ +#endif + } +#endif +#ifdef FE_DIVBYZERO + if (excepts & FE_DIVBYZERO) + { + float f = 1.0f, g = 0.0f; +#ifdef __x86_64__ + volatile float r __attribute__ ((unused)); + asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g)); + r = f; /* Needed to trigger exception. */ +#else + asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g)); + /* No need for fwait, exception is triggered by emitted fstp. */ +#endif + } +#endif +#ifdef FE_OVERFLOW + if (excepts & FE_OVERFLOW) + { + struct fenv temp; + asm volatile ("fnstenv\t%0" : "=m" (temp)); + temp.__status_word |= 0x08; + asm volatile ("fldenv\t%0" : : "m" (temp)); + asm volatile ("fwait"); + } +#endif +#ifdef FE_UNDERFLOW + if (excepts & FE_UNDERFLOW) + { + struct fenv temp; + asm volatile ("fnstenv\t%0" : "=m" (temp)); + temp.__status_word |= 0x10; + asm volatile ("fldenv\t%0" : : "m" (temp)); + asm volatile ("fwait"); + } +#endif +#ifdef FE_INEXACT + if (excepts & FE_INEXACT) + { + float f = 1.0f, g = 3.0f; +#ifdef __x86_64__ + volatile float r __attribute__ ((unused)); + asm volatile ("%vdivss\t{%1, %d0|%d0, %1}" : "+x" (f) : "xm" (g)); + r = f; /* Needed to trigger exception. */ +#else + asm volatile ("fdivs\t%1" : "+t" (f) : "m" (g)); + /* No need for fwait, exception is triggered by emitted fstp. */ +#endif + } +#endif +}