diff mbox series

[i386] : Remove redundant constraints from ALU insn patterns

Message ID CAFULd4YDYvJsghVvu8pYBwWofJr2r3ni67-s=pmLjwqJggrUjg@mail.gmail.com
State New
Headers show
Series [i386] : Remove redundant constraints from ALU insn patterns | expand

Commit Message

Uros Bizjak July 17, 2019, 6:34 p.m. UTC 
No functional changes.

2019-07-17  Uroš Bizjak  <ubizjak@gmail.com>

    * config/i386/i386.md (*add<dwi>3_doubleword):
    Remove redundant constraints.
    (*add<mode>_1): Ditto.
    (*addhi_1): Ditto.
    (*addqi_1): Ditto.
    (*addqi_1_slp): Ditto.
    (*add<mode>_2): Ditto.
    (*addv<mode>4): Ditto.
    (*sub<dwi>3_doubleword): Ditto.
    (*sub<mode>_1): Ditto.
    (*subqi_1_slp): Ditto.
    (*sub<mode>_2): Ditto.
    (*subv<mode>4): Ditto.
    (*sub<mode>_3): Ditto.
    (@add<mode>3_carry): Ditto.
    (@sub<mode>3_carry): Ditto.
    (*add<mode>3_cc_overflow_1): Ditto.
    (*add<mode>3_zext_cc_overflow_2): Ditto.
    (*anddi_1): Ditto.
    (*and<mode>_1): Ditto.
    (*andqi_1): Ditto.
    (*andqi_1_slp): Ditto.
    (*anddi_2): Ditto.
    (*andqi_2_maybe_si): Ditto.
    (*and<mode>_2): Ditto.
    (*andqi_2_slp): Ditto.
    (*<code><mode>_1): Ditto.
    (*<code>qi_1): Ditto.
    (*<code>qi_1_slp): Ditto.
    (*<code><mode>_2): Ditto.
    (*<code>qi_2_slp): Ditto.

Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Committed to mainline SVN.

Uros.
diff mbox series

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index eb32d7c1d2a5..4a359e8035fd 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -5337,11 +5337,10 @@ 
   "ix86_expand_binary_operator (PLUS, <MODE>mode, operands); DONE;")
 
 (define_insn_and_split "*add<dwi>3_doubleword"
-  [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=r,o")
+  [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
 	(plus:<DWI>
 	  (match_operand:<DWI> 1 "nonimmediate_operand" "%0,0")
-	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand"
-							"ro<di>,r<di>")))
+	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "r<di>,o")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, <DWI>mode, operands)"
   "#"
@@ -5369,10 +5368,10 @@ 
 })
 
 (define_insn "*add<mode>_1"
-  [(set (match_operand:SWI48 0 "nonimmediate_operand" "=r,rm,r,r")
+  [(set (match_operand:SWI48 0 "nonimmediate_operand" "=rm,r,r,r")
 	(plus:SWI48
 	  (match_operand:SWI48 1 "nonimmediate_operand" "%0,0,r,r")
-	  (match_operand:SWI48 2 "x86_64_general_operand" "rme,re,0,le")))
+	  (match_operand:SWI48 2 "x86_64_general_operand" "re,m,0,le")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
 {
@@ -5475,7 +5474,7 @@ 
 (define_insn "*addhi_1"
   [(set (match_operand:HI 0 "nonimmediate_operand" "=rm,r,r,Yp")
 	(plus:HI (match_operand:HI 1 "nonimmediate_operand" "%0,0,r,Yp")
-		 (match_operand:HI 2 "general_operand" "rn,rm,0,ln")))
+		 (match_operand:HI 2 "general_operand" "rn,m,0,ln")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, HImode, operands)"
 {
@@ -5524,7 +5523,7 @@ 
 (define_insn "*addqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,q,r,r,Yp")
 	(plus:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,q,0,r,Yp")
-		 (match_operand:QI 2 "general_operand" "qn,qm,0,rn,0,ln")))
+		 (match_operand:QI 2 "general_operand" "qn,m,0,rn,0,ln")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, QImode, operands)"
 {
@@ -5587,7 +5586,7 @@ 
 (define_insn "*addqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(plus:QI (match_dup 0)
-		 (match_operand:QI 1 "general_operand" "qn,qm")))
+		 (match_operand:QI 1 "general_operand" "qn,m")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -5680,9 +5679,9 @@ 
 	(compare
 	  (plus:SWI
 	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0,<r>")
-	    (match_operand:SWI 2 "<general_operand>" "<g>,<r><i>,0"))
+	    (match_operand:SWI 2 "<general_operand>" "<r><i>,m,0"))
 	  (const_int 0)))
-   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m,<r>")
+   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>,<r>")
 	(plus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCGOCmode)
    && ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
@@ -6073,11 +6072,10 @@ 
 		   (sign_extend:<DWI>
 		      (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
 		   (sign_extend:<DWI>
-		      (match_operand:SWI 2 "<general_sext_operand>"
-					   "<r>mWe,<r>We")))
+		      (match_operand:SWI 2 "<general_sext_operand>" "<r>We,m")))
 		(sign_extend:<DWI>
 		   (plus:SWI (match_dup 1) (match_dup 2)))))
-   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m")
+   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(plus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
   "add{<imodesuffix>}\t{%2, %0|%0, %2}"
@@ -6091,9 +6089,9 @@ 
 		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
 		   (match_operand:<DWI> 3 "const_int_operand" "i"))
 		(sign_extend:<DWI>
-		   (plus:SWI (match_dup 1)
-			     (match_operand:SWI 2 "x86_64_immediate_operand"
-						  "<i>")))))
+		   (plus:SWI
+		     (match_dup 1)
+		     (match_operand:SWI 2 "x86_64_immediate_operand" "<i>")))))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
 	(plus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)
@@ -6297,11 +6295,10 @@ 
   "ix86_expand_binary_operator (MINUS, <MODE>mode, operands); DONE;")
 
 (define_insn_and_split "*sub<dwi>3_doubleword"
-  [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=r,o")
+  [(set (match_operand:<DWI> 0 "nonimmediate_operand" "=ro,r")
 	(minus:<DWI>
 	  (match_operand:<DWI> 1 "nonimmediate_operand" "0,0")
-	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand"
-							"ro<di>,r<di>")))
+	  (match_operand:<DWI> 2 "x86_64_hilo_general_operand" "r<di>,o")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
   "#"
@@ -6330,7 +6327,7 @@ 
   [(set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(minus:SWI
 	  (match_operand:SWI 1 "nonimmediate_operand" "0,0")
-	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
+	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
   "sub{<imodesuffix>}\t{%2, %0|%0, %2}"
@@ -6351,7 +6348,7 @@ 
 (define_insn "*subqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(minus:QI (match_dup 0)
-		  (match_operand:QI 1 "general_operand" "qn,qm")))
+		  (match_operand:QI 1 "general_operand" "qn,m")))
    (clobber (reg:CC FLAGS_REG))]
   "(! TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -6364,7 +6361,7 @@ 
 	(compare
 	  (minus:SWI
 	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
-	    (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
+	    (match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
 	  (const_int 0)))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(minus:SWI (match_dup 1) (match_dup 2)))]
@@ -6422,8 +6419,7 @@ 
 		   (sign_extend:<DWI>
 		      (match_operand:SWI 1 "nonimmediate_operand" "0,0"))
 		   (sign_extend:<DWI>
-		      (match_operand:SWI 2 "<general_sext_operand>"
-					   "<r>We,<r>m")))
+		      (match_operand:SWI 2 "<general_sext_operand>" "<r>We,m")))
 		(sign_extend:<DWI>
 		   (minus:SWI (match_dup 1) (match_dup 2)))))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
@@ -6440,9 +6436,9 @@ 
 		      (match_operand:SWI 1 "nonimmediate_operand" "0"))
 		   (match_operand:<DWI> 3 "const_int_operand" "i"))
 		(sign_extend:<DWI>
-		   (minus:SWI (match_dup 1)
-			      (match_operand:SWI 2 "x86_64_immediate_operand"
-						   "<i>")))))
+		   (minus:SWI
+		     (match_dup 1)
+		     (match_operand:SWI 2 "x86_64_immediate_operand" "<i>")))))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m")
 	(minus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)
@@ -6475,7 +6471,7 @@ 
 (define_insn "*sub<mode>_3"
   [(set (reg FLAGS_REG)
 	(compare (match_operand:SWI 1 "nonimmediate_operand" "0,0")
-		 (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
+		 (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(minus:SWI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCmode)
@@ -6518,7 +6514,7 @@ 
 	    (match_operator:SWI 4 "ix86_carry_flag_operator"
 	     [(match_operand 3 "flags_reg_operand") (const_int 0)])
 	    (match_operand:SWI 1 "nonimmediate_operand" "%0,0"))
-	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
+	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (PLUS, <MODE>mode, operands)"
   "adc{<imodesuffix>}\t{%2, %0|%0, %2}"
@@ -6618,7 +6614,7 @@ 
 	    (match_operand:SWI 1 "nonimmediate_operand" "0,0")
 	    (match_operator:SWI 4 "ix86_carry_flag_operator"
 	     [(match_operand 3 "flags_reg_operand") (const_int 0)]))
-	  (match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m")))
+	  (match_operand:SWI 2 "<general_operand>" "<r><i>,m")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (MINUS, <MODE>mode, operands)"
   "sbb{<imodesuffix>}\t{%2, %0|%0, %2}"
@@ -6783,7 +6779,7 @@ 
 	(compare:CCC
 	    (plus:SWI
 		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
-		(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
+		(match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
 	    (match_dup 1)))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(plus:SWI (match_dup 1) (match_dup 2)))]
@@ -6824,7 +6820,7 @@ 
 	(compare:CCC
 	    (plus:SWI
 		(match_operand:SWI 1 "nonimmediate_operand" "%0,0")
-		(match_operand:SWI 2 "<general_operand>" "<r><i>,<r>m"))
+		(match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
 	    (match_dup 2)))
    (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(plus:SWI (match_dup 1) (match_dup 2)))]
@@ -8431,7 +8427,7 @@ 
   [(set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r,r")
 	(and:DI
 	 (match_operand:DI 1 "nonimmediate_operand" "%0,0,0,qm")
-	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,rm,L")))
+	 (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,m,L")))
    (clobber (reg:CC FLAGS_REG))]
   "TARGET_64BIT && ix86_binary_operator_ok (AND, DImode, operands)"
   "@
@@ -8516,7 +8512,7 @@ 
 (define_insn "*and<mode>_1"
   [(set (match_operand:SWI24 0 "nonimmediate_operand" "=rm,r,Ya")
 	(and:SWI24 (match_operand:SWI24 1 "nonimmediate_operand" "%0,0,qm")
-		   (match_operand:SWI24 2 "<general_operand>" "r<i>,rm,L")))
+		   (match_operand:SWI24 2 "<general_operand>" "r<i>,m,L")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (AND, <MODE>mode, operands)"
   "@
@@ -8537,7 +8533,7 @@ 
 (define_insn "*andqi_1"
   [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
 	(and:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		(match_operand:QI 2 "general_operand" "qn,qmn,rn")))
+		(match_operand:QI 2 "general_operand" "qn,m,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (AND, QImode, operands)"
   "@
@@ -8555,7 +8551,7 @@ 
 (define_insn "*andqi_1_slp"
   [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(and:QI (match_dup 0)
-		(match_operand:QI 1 "general_operand" "qn,qmn")))
+		(match_operand:QI 1 "general_operand" "qn,m")))
    (clobber (reg:CC FLAGS_REG))]
   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -8644,9 +8640,9 @@ 
 	(compare
 	 (and:DI
 	  (match_operand:DI 1 "nonimmediate_operand" "%0,0,0")
-	  (match_operand:DI 2 "x86_64_szext_general_operand" "Z,rem,re"))
+	  (match_operand:DI 2 "x86_64_szext_general_operand" "Z,re,m"))
 	 (const_int 0)))
-   (set (match_operand:DI 0 "nonimmediate_operand" "=r,r,rm")
+   (set (match_operand:DI 0 "nonimmediate_operand" "=r,rm,r")
 	(and:DI (match_dup 1) (match_dup 2)))]
   "TARGET_64BIT
    && ix86_match_ccmode
@@ -8687,9 +8683,9 @@ 
   [(set (reg FLAGS_REG)
 	(compare (and:QI
 		  (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		  (match_operand:QI 2 "general_operand" "qmn,qn,n"))
+		  (match_operand:QI 2 "general_operand" "qn,m,n"))
 		 (const_int 0)))
-   (set (match_operand:QI 0 "nonimmediate_operand" "=q,qm,*r")
+   (set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,*r")
 	(and:QI (match_dup 1) (match_dup 2)))]
   "ix86_binary_operator_ok (AND, QImode, operands)
    && ix86_match_ccmode (insn,
@@ -8711,9 +8707,9 @@ 
   [(set (reg FLAGS_REG)
 	(compare (and:SWI124
 		  (match_operand:SWI124 1 "nonimmediate_operand" "%0,0")
-		  (match_operand:SWI124 2 "<general_operand>" "<g>,<r><i>"))
+		  (match_operand:SWI124 2 "<general_operand>" "<r><i>,m"))
 		 (const_int 0)))
-   (set (match_operand:SWI124 0 "nonimmediate_operand" "=<r>,<r>m")
+   (set (match_operand:SWI124 0 "nonimmediate_operand" "=<r>m,<r>")
 	(and:SWI124 (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCNOmode)
    && ix86_binary_operator_ok (AND, <MODE>mode, operands)"
@@ -8723,9 +8719,8 @@ 
 
 (define_insn "*andqi_2_slp"
   [(set (reg FLAGS_REG)
-	(compare (and:QI
-		   (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
-		   (match_operand:QI 1 "nonimmediate_operand" "qmn,qn"))
+	(compare (and:QI (match_operand:QI 0 "nonimmediate_operand" "+qm,q")
+		 	 (match_operand:QI 1 "nonimmediate_operand" "qn,m"))
 		 (const_int 0)))
    (set (strict_low_part (match_dup 0))
 	(and:QI (match_dup 0) (match_dup 1)))]
@@ -9001,10 +8996,10 @@ 
 })
 
 (define_insn "*<code><mode>_1"
-  [(set (match_operand:SWI248 0 "nonimmediate_operand" "=r,rm")
+  [(set (match_operand:SWI248 0 "nonimmediate_operand" "=rm,r")
 	(any_or:SWI248
 	 (match_operand:SWI248 1 "nonimmediate_operand" "%0,0")
-	 (match_operand:SWI248 2 "<general_operand>" "<g>,r<i>")))
+	 (match_operand:SWI248 2 "<general_operand>" "r<i>,m")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
   "<logic>{<imodesuffix>}\t{%2, %0|%0, %2}"
@@ -9081,9 +9076,9 @@ 
    (set_attr "mode" "SI")])
 
 (define_insn "*<code>qi_1"
-  [(set (match_operand:QI 0 "nonimmediate_operand" "=q,m,r")
+  [(set (match_operand:QI 0 "nonimmediate_operand" "=qm,q,r")
 	(any_or:QI (match_operand:QI 1 "nonimmediate_operand" "%0,0,0")
-		   (match_operand:QI 2 "general_operand" "qmn,qn,rn")))
+		   (match_operand:QI 2 "general_operand" "qn,m,rn")))
    (clobber (reg:CC FLAGS_REG))]
   "ix86_binary_operator_ok (<CODE>, QImode, operands)"
   "@
@@ -9099,9 +9094,9 @@ 
 	   (symbol_ref "true")))])
 
 (define_insn "*<code>qi_1_slp"
-  [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+q,m"))
+  [(set (strict_low_part (match_operand:QI 0 "nonimmediate_operand" "+qm,q"))
 	(any_or:QI (match_dup 0)
-		   (match_operand:QI 1 "general_operand" "qmn,qn")))
+		   (match_operand:QI 1 "general_operand" "qn,m")))
    (clobber (reg:CC FLAGS_REG))]
   "(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
    && !(MEM_P (operands[0]) && MEM_P (operands[1]))"
@@ -9113,9 +9108,9 @@ 
   [(set (reg FLAGS_REG)
 	(compare (any_or:SWI
 		  (match_operand:SWI 1 "nonimmediate_operand" "%0,0")
-		  (match_operand:SWI 2 "<general_operand>" "<g>,<r><i>"))
+		  (match_operand:SWI 2 "<general_operand>" "<r><i>,m"))
 		 (const_int 0)))
-   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>,<r>m")
+   (set (match_operand:SWI 0 "nonimmediate_operand" "=<r>m,<r>")
 	(any_or:SWI (match_dup 1) (match_dup 2)))]
   "ix86_match_ccmode (insn, CCNOmode)
    && ix86_binary_operator_ok (<CODE>, <MODE>mode, operands)"
@@ -9154,8 +9149,8 @@ 
 
 (define_insn "*<code>qi_2_slp"
   [(set (reg FLAGS_REG)
-	(compare (any_or:QI (match_operand:QI 0 "nonimmediate_operand" "+q,qm")
-			    (match_operand:QI 1 "general_operand" "qmn,qn"))
+	(compare (any_or:QI (match_operand:QI 0 "nonimmediate_operand" "+qm,q")
+			    (match_operand:QI 1 "general_operand" "qn,m"))
 		 (const_int 0)))
    (set (strict_low_part (match_dup 0))
 	(any_or:QI (match_dup 0) (match_dup 1)))]