From patchwork Mon Sep 25 15:54:46 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qing Zhao X-Patchwork-Id: 818303 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-462903-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="OPKDroJr"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3y17vZ2ntcz9sP1 for ; Tue, 26 Sep 2017 01:55:04 +1000 (AEST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:content-transfer-encoding:mime-version:subject :message-id:date:to; q=dns; s=default; b=USBGhsZQ+jn6xnmKNlbF/0k EHkHELCsrh02XzklUIHC1bJHfuxVwUgn8TNl7yebUsg6F3xfzStjmJx5+WS7AkLQ yikgejdmJM1x2krrLhtscd+nVt805zNsSmo9fX8fOmdxReGZMoXBjGEf7AihWBrJ pzvVL0WL/hzzpvMP0/ZU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :content-type:content-transfer-encoding:mime-version:subject :message-id:date:to; s=default; bh=ShZrpeTrrBFlq9dQvlsI6JPcDu0=; b= OPKDroJr5S8vQ6h0pRHXpZ9PsOMY9V0Ock9NrghKdncechlGEf1FIcLZVl8374KF 8x99SW/NGJ87ww1GUgqGcpqnOiECZxNwlC82XempJz0H4AokXc0HAMyUfDwFvOFL RnyznhfROtUUuD21KTV5mbDkc4RkiSu2J1sLSMFZFZY= Received: (qmail 60162 invoked by alias); 25 Sep 2017 15:54:53 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 60022 invoked by uid 89); 25 Sep 2017 15:54:52 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-25.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.2 spammy=H*r:Gateway X-HELO: userp1040.oracle.com Received: from userp1040.oracle.com (HELO userp1040.oracle.com) (156.151.31.81) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 25 Sep 2017 15:54:51 +0000 Received: from userv0022.oracle.com (userv0022.oracle.com [156.151.31.74]) by userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id v8PFsmEG005258 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Mon, 25 Sep 2017 15:54:49 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by userv0022.oracle.com (8.14.4/8.14.4) with ESMTP id v8PFsm7S021419 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK) for ; Mon, 25 Sep 2017 15:54:48 GMT Received: from abhmp0004.oracle.com (abhmp0004.oracle.com [141.146.116.10]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id v8PFslkq001803 for ; Mon, 25 Sep 2017 15:54:48 GMT Received: from dhcp-amer-vpn-adc-anyconnect-10-154-134-204.vpn.oracle.com (/10.154.134.204) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Mon, 25 Sep 2017 08:54:47 -0700 From: Qing Zhao Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\)) Subject: [PATCH] Fix PR80295[aarch64] [7/8 Regression] ICE in __builtin_update_setjmp_buf expander Message-Id: Date: Mon, 25 Sep 2017 10:54:46 -0500 To: gcc-patches@gcc.gnu.org X-IsSubscribed: yes Hi, This patch fixes the aarch64 bug 80295 https://gcc.gnu.org/PR80295 The aarch64 backend has multiple places that miss the handling of TARGET_ILP32. in the patch, we added correct handling of TARGET_ILP32 into aarch64 backend. a new small testing case is added. bootstrapped and tested on aarch64-unknown-linux-gnu with no regression. thanks. Qing ========== gcc/ChangeLog: * config/aarch64/aarch64.c (aarch64_expand_prologue): emit different modes of stack_tie insn depend on TARGET_ILP32. (aarch64_expand_epilogue): Likewise. * config/aarch64/aarch64.h: define Pmode to SImode/DImode depend on TARGET_ILP32. * config/aarch64/aarch64.md: define insn stack_tie to different modes (SImode/DImode) gcc/testsuite/ChangeLog: PR middle-end/80295 * gcc.target/aarch64/pr80295.c: New test. --- gcc/config/aarch64/aarch64.c | 12 +++++++++--- gcc/config/aarch64/aarch64.h | 2 +- gcc/config/aarch64/aarch64.md | 6 +++--- gcc/testsuite/gcc.target/aarch64/pr80295.c | 8 ++++++++ 4 files changed, 21 insertions(+), 7 deletions(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/pr80295.c diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 6c3ef76..876e9e3 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -3693,7 +3693,9 @@ aarch64_expand_prologue (void) stack_pointer_rtx, GEN_INT (callee_offset))); RTX_FRAME_RELATED_P (insn) = 1; - emit_insn (gen_stack_tie (stack_pointer_rtx, hard_frame_pointer_rtx)); + emit_insn (TARGET_ILP32 ? + gen_stack_tiesi (stack_pointer_rtx, hard_frame_pointer_rtx) : + gen_stack_tiedi (stack_pointer_rtx, hard_frame_pointer_rtx)); } aarch64_save_callee_saves (DImode, callee_offset, R0_REGNUM, R30_REGNUM, @@ -3750,7 +3752,9 @@ aarch64_expand_epilogue (bool for_sibcall) if (final_adjust > crtl->outgoing_args_size || cfun->calls_alloca || crtl->calls_eh_return) { - emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx)); + emit_insn (TARGET_ILP32 ? + gen_stack_tiesi (stack_pointer_rtx, stack_pointer_rtx) : + gen_stack_tiedi (stack_pointer_rtx, stack_pointer_rtx)); need_barrier_p = false; } @@ -3774,7 +3778,9 @@ aarch64_expand_epilogue (bool for_sibcall) callee_adjust != 0, &cfi_ops); if (need_barrier_p) - emit_insn (gen_stack_tie (stack_pointer_rtx, stack_pointer_rtx)); + emit_insn (TARGET_ILP32 ? + gen_stack_tiesi (stack_pointer_rtx, stack_pointer_rtx) : + gen_stack_tiedi (stack_pointer_rtx, stack_pointer_rtx)); if (callee_adjust != 0) aarch64_pop_regs (reg1, reg2, callee_adjust, &cfi_ops); diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 8fada9e..df58442 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -782,7 +782,7 @@ typedef struct /* Specify the machine mode that the hardware addresses have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ -#define Pmode DImode +#define Pmode (TARGET_ILP32 ? SImode : DImode) /* A C expression whose value is zero if pointers that need to be extended from being `POINTER_SIZE' bits wide to `Pmode' are sign-extended and diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index bb7f2c0..30853b2 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -5533,10 +5533,10 @@ [(set_attr "type" "call") (set_attr "length" "16")]) -(define_insn "stack_tie" +(define_insn "stack_tie" [(set (mem:BLK (scratch)) - (unspec:BLK [(match_operand:DI 0 "register_operand" "rk") - (match_operand:DI 1 "register_operand" "rk")] + (unspec:BLK [(match_operand:GPI 0 "register_operand" "rk") + (match_operand:GPI 1 "register_operand" "rk")] UNSPEC_PRLG_STK))] "" "" diff --git a/gcc/testsuite/gcc.target/aarch64/pr80295.c b/gcc/testsuite/gcc.target/aarch64/pr80295.c new file mode 100644 index 0000000..b3866d8 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/pr80295.c @@ -0,0 +1,8 @@ +/* { dg-do compile } */ +/* { dg-options "-mabi=ilp32" } */ + +void f (void *b) +{ + __builtin_update_setjmp_buf (b); +} +