From patchwork Wed Dec 7 22:58:22 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Pinski X-Patchwork-Id: 130075 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 05FAE1007D6 for ; Thu, 8 Dec 2011 09:58:38 +1100 (EST) Received: (qmail 2725 invoked by alias); 7 Dec 2011 22:58:36 -0000 Received: (qmail 2705 invoked by uid 22791); 7 Dec 2011 22:58:35 -0000 X-SWARE-Spam-Status: No, hits=-2.3 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, TW_BF X-Spam-Check-By: sourceware.org Received: from mail-vx0-f175.google.com (HELO mail-vx0-f175.google.com) (209.85.220.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 07 Dec 2011 22:58:23 +0000 Received: by vcbfo13 with SMTP id fo13so1020520vcb.20 for ; Wed, 07 Dec 2011 14:58:22 -0800 (PST) MIME-Version: 1.0 Received: by 10.220.151.195 with SMTP id d3mr74912vcw.27.1323298702455; Wed, 07 Dec 2011 14:58:22 -0800 (PST) Received: by 10.220.229.66 with HTTP; Wed, 7 Dec 2011 14:58:22 -0800 (PST) Date: Wed, 7 Dec 2011 14:58:22 -0800 Message-ID: Subject: [Committed] Fix PR libffi/50051 (MIPS libffi does not compile for mips64octeon-linux-gnu) From: Andrew Pinski To: GCC Patches , Java Patch List X-IsSubscribed: yes Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, The problem here is Cavium's octeon assembler rejects floating point if the arch is set to either octeon or octeon2. This fixes the issue by adding: .set mips4 so that floating point instructions are enabled. Committed as approved by Anthony in the bugzilla. Thanks, Andrew Pinski libffi/ChangeLog: * src/mips/n32.S: Add ".set mips4". Index: src/mips/n32.S =================================================================== --- src/mips/n32.S (revision 182083) +++ src/mips/n32.S (working copy) @@ -43,6 +43,7 @@ #ifdef __GNUC__ .abicalls #endif + .set mips4 .text .align 2 .globl ffi_call_N32