| Message ID | AM0PR08MB53808FC66E98DD6AC36501C49B9D0@AM0PR08MB5380.eurprd08.prod.outlook.com |
|---|---|
| State | New |
| Headers | show |
| Series | [GCC-10,Backport] arm: Fix unintentional fall throughs in arm.c | expand |
> -----Original Message----- > From: Srinath Parvathaneni <Srinath.Parvathaneni@arm.com> > Sent: 16 June 2020 11:52 > To: gcc-patches@gcc.gnu.org > Cc: Kyrylo Tkachov <Kyrylo.Tkachov@arm.com> > Subject: [PATCH][GCC-10 Backport] arm: Fix unintentional fall throughs in > arm.c > > Hi all, > > This small patch fix some unintentional fall-throughs in > `mve_vector_mem_operand'. > > Regtested and bootstraped on arm-linux-gnueabihf. > > Okay for GCC-10 branch? Ok. Thanks, Kyrill > > Regards, > Srinath > > gcc/ChangeLog > > 2020-06-09 Srinath Parvathaneni <srinath.parvathaneni@arm.com> > > Backported from mainline > 2020-05-28 Andrea Corallo <andrea.corallo@arm.com> > > * config/arm/arm.c (mve_vector_mem_operand): Fix unwanted > fall-throughs. > > > ############### Attachment also inlined for ease of reply > ############### > > > diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c > index > 01bc1b8ae9b72700ca5ae0840ee4496fd686b623..a7b7c55a763c66382bc140a > 4c504840c509df84c 100644 > --- a/gcc/config/arm/arm.c > +++ b/gcc/config/arm/arm.c > @@ -13302,26 +13302,31 @@ mve_vector_mem_operand (machine_mode > mode, rtx op, bool strict) > if (abs_hwi (val)) > return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) > || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); > + return FALSE; > case E_V8HImode: > case E_V8HFmode: > if (abs (val) <= 255) > return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) > || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); > + return FALSE; > case E_V8QImode: > case E_V4QImode: > if (abs_hwi (val)) > return (reg_no <= LAST_LO_REGNUM > || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); > + return FALSE; > case E_V4HImode: > case E_V4HFmode: > if (val % 2 == 0 && abs (val) <= 254) > return (reg_no <= LAST_LO_REGNUM > || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); > + return FALSE; > case E_V4SImode: > case E_V4SFmode: > if (val % 4 == 0 && abs (val) <= 508) > return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) > || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); > + return FALSE; > case E_V2DImode: > case E_V2DFmode: > case E_TImode:
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 01bc1b8ae9b72700ca5ae0840ee4496fd686b623..a7b7c55a763c66382bc140a4c504840c509df84c 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -13302,26 +13302,31 @@ mve_vector_mem_operand (machine_mode mode, rtx op, bool strict) if (abs_hwi (val)) return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); + return FALSE; case E_V8HImode: case E_V8HFmode: if (abs (val) <= 255) return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); + return FALSE; case E_V8QImode: case E_V4QImode: if (abs_hwi (val)) return (reg_no <= LAST_LO_REGNUM || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); + return FALSE; case E_V4HImode: case E_V4HFmode: if (val % 2 == 0 && abs (val) <= 254) return (reg_no <= LAST_LO_REGNUM || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); + return FALSE; case E_V4SImode: case E_V4SFmode: if (val % 4 == 0 && abs (val) <= 508) return ((reg_no < LAST_ARM_REGNUM && reg_no != SP_REGNUM) || (!strict && reg_no >= FIRST_PSEUDO_REGISTER)); + return FALSE; case E_V2DImode: case E_V2DFmode: case E_TImode: