From patchwork Thu Mar 24 09:06:21 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ira Rosen X-Patchwork-Id: 88147 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 33D56B6F90 for ; Thu, 24 Mar 2011 20:06:31 +1100 (EST) Received: (qmail 20561 invoked by alias); 24 Mar 2011 09:06:28 -0000 Received: (qmail 20549 invoked by uid 22791); 24 Mar 2011 09:06:27 -0000 X-SWARE-Spam-Status: No, hits=-1.7 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW X-Spam-Check-By: sourceware.org Received: from mail-yx0-f175.google.com (HELO mail-yx0-f175.google.com) (209.85.213.175) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Thu, 24 Mar 2011 09:06:22 +0000 Received: by yxn22 with SMTP id 22so5093409yxn.20 for ; Thu, 24 Mar 2011 02:06:21 -0700 (PDT) MIME-Version: 1.0 Received: by 10.151.13.11 with SMTP id q11mr7745140ybi.272.1300957581683; Thu, 24 Mar 2011 02:06:21 -0700 (PDT) Received: by 10.150.92.11 with HTTP; Thu, 24 Mar 2011 02:06:21 -0700 (PDT) Date: Thu, 24 Mar 2011 11:06:21 +0200 Message-ID: Subject: [patch, ARM] Enable auto-detection of vector size for NEON From: Ira Rosen To: gcc-patches@gcc.gnu.org Cc: Patch Tracking Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hi, This patch implements TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES for ARM NEON. Regtested on arm-linux-gnueabi. OK for trunk? Thanks, Ira ChangeLog: * config/arm/arm.c (arm_autovectorize_vector_sizes): New function. (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES): Define. testsuite/ChangeLog: * gcc.dg/vect/vect-outer-5.c: Reduce the distance between data accesses to preserve the meaning of the test for doubleword vectors. * gcc.dg/vect/no-vfa-pr29145.c: Likewise. * gcc.dg/vect/slp-3.c: Reduce the loop bound for the same reason. Index: config/arm/arm.c =================================================================== --- config/arm/arm.c (revision 171339) +++ config/arm/arm.c (working copy) @@ -252,6 +252,7 @@ static bool arm_builtin_support_vector_misalignmen bool is_packed); static void arm_conditional_register_usage (void); static reg_class_t arm_preferred_rename_class (reg_class_t rclass); +static unsigned int arm_autovectorize_vector_sizes (void); ^L /* Table of machine attributes. */ @@ -404,6 +405,9 @@ static const struct default_options arm_option_opt #define TARGET_VECTOR_MODE_SUPPORTED_P arm_vector_mode_supported_p #undef TARGET_VECTORIZE_PREFERRED_SIMD_MODE #define TARGET_VECTORIZE_PREFERRED_SIMD_MODE arm_preferred_simd_mode +#undef TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES +#define TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_SIZES \ + arm_autovectorize_vector_sizes #undef TARGET_MACHINE_DEPENDENT_REORG #define TARGET_MACHINE_DEPENDENT_REORG arm_reorg @@ -23528,6 +23532,12 @@ arm_expand_sync (enum machine_mode mode, } } +static unsigned int +arm_autovectorize_vector_sizes (void) +{ + return TARGET_NEON_VECTORIZE_QUAD ? 16 | 8 : 0; +} + static bool arm_vector_alignment_reachable (const_tree type, bool is_packed) { Index: testsuite/gcc.dg/vect/vect-outer-5.c =================================================================== --- testsuite/gcc.dg/vect/vect-outer-5.c (revision 171339) +++ testsuite/gcc.dg/vect/vect-outer-5.c (working copy) @@ -17,7 +17,7 @@ int main1 () float B[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); float C[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); float D[N] __attribute__ ((__aligned__(__BIGGEST_ALIGNMENT__))); - float E[4] = {0,1,2,480}; + float E[4] = {0,480,960,1440}; float s; int i, j; @@ -55,7 +55,7 @@ int main1 () s = 0; for (j=0; j