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[vect] Ask for review and approving the patch about vect and loongson

Message ID AANLkTilnK_BsnU5EhGFWhFcERkWEMDz_YQyE_7oaTWxI@mail.gmail.com
State New
Headers show

Commit Message

Eric Fisher July 15, 2010, 6:18 a.m. UTC 
2010/7/14 Richard Sandiford <rdsandiford@googlemail.com>:

> Watch the formatting: the (match_operand: ...)s should line up vertically.

Thanks. I've updated the patch.

> This could in theory cause us to miscompile things like:
>
>   v2hi >> (shift & 15)
>
> and although I can't come up with a testcase, I think the problem
> is still there.
>
> Admittedly this means the current code is wrong too.  It should be
> using UNSPECs instead of shift rtxes.
>
> One fix would be to make SHIFT_COUNT_TRUNCATED take a mode argument
> (and turn it into a target hook at the same time).
>

Richard, you're right. I can produce this problem with a testcase now.

Eric
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Patch

Index: config/mips/loongson.md
===================================================================
--- config/mips/loongson.md	(revision 162124)
+++ config/mips/loongson.md	(working copy)
@@ -31,7 +31,6 @@ 
   UNSPEC_LOONGSON_PMOVMSK
   UNSPEC_LOONGSON_PMULHU
   UNSPEC_LOONGSON_PMULH
-  UNSPEC_LOONGSON_PMULL
   UNSPEC_LOONGSON_PMULU
   UNSPEC_LOONGSON_PASUBUB
   UNSPEC_LOONGSON_BIADD
@@ -353,11 +352,10 @@ 
   [(set_attr "type" "fmul")])
 
 ;; Multiply signed integers and store low result.
-(define_insn "loongson_pmull<V_suffix>"
+(define_insn "mul<mode>3"
   [(set (match_operand:VH 0 "register_operand" "=f")
-        (unspec:VH [(match_operand:VH 1 "register_operand" "f")
-		    (match_operand:VH 2 "register_operand" "f")]
-		   UNSPEC_LOONGSON_PMULL))]
+        (mult:VH (match_operand:VH 1 "register_operand" "f")
+                 (match_operand:VH 2 "register_operand" "f")))]
   "TARGET_HARD_FLOAT && TARGET_LOONGSON_VECTORS"
   "pmull<V_suffix>\t%0,%1,%2"
   [(set_attr "type" "fmul")])