From patchwork Mon Sep 27 06:29:17 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Uros Bizjak X-Patchwork-Id: 65810 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) by ozlabs.org (Postfix) with SMTP id 35042B70CD for ; Mon, 27 Sep 2010 16:29:28 +1000 (EST) Received: (qmail 27168 invoked by alias); 27 Sep 2010 06:29:26 -0000 Received: (qmail 27158 invoked by uid 22791); 27 Sep 2010 06:29:24 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL, BAYES_00, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, TW_ZJ, T_TO_NO_BRKTS_FREEMAIL X-Spam-Check-By: sourceware.org Received: from mail-qy0-f182.google.com (HELO mail-qy0-f182.google.com) (209.85.216.182) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Mon, 27 Sep 2010 06:29:19 +0000 Received: by qyk7 with SMTP id 7so4726196qyk.20 for ; Sun, 26 Sep 2010 23:29:17 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.28.211 with SMTP id n19mr4300795qac.135.1285568957403; Sun, 26 Sep 2010 23:29:17 -0700 (PDT) Received: by 10.229.84.4 with HTTP; Sun, 26 Sep 2010 23:29:17 -0700 (PDT) Date: Mon, 27 Sep 2010 08:29:17 +0200 Message-ID: Subject: [PATCH, i386]: Some trivial i386.h cleanups From: Uros Bizjak To: gcc-patches@gcc.gnu.org Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Hello! 2010-09-27 Uros Bizjak * config/i386/i386.h (CLASS_MAX_NREGS): Also handle XCmode. (UNITS_PER_WORD): Define only when IN_LIBGCC2 is undefined. (MOVE_MAX_PIECES): Redefine using UNITS_PER_WORD. (ASM_OUTPUT_AVX_PREFIX): Simplify pointer addition. Tested on x86_64-pc-linux-gnu {,-m32}, committed to mainline SVN. Uros. Index: i386.h =================================================================== --- i386.h (revision 164635) +++ i386.h (working copy) @@ -674,9 +674,8 @@ enum target_cpu_default /* Width of a word, in units (bytes). */ #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) -#ifdef IN_LIBGCC2 -#define MIN_UNITS_PER_WORD (TARGET_64BIT ? 8 : 4) -#else + +#ifndef IN_LIBGCC2 #define MIN_UNITS_PER_WORD 4 #endif @@ -863,8 +862,8 @@ enum target_cpu_default #define STACK_REGS #define IS_STACK_MODE(MODE) \ - (((MODE) == SFmode && (!TARGET_SSE || !TARGET_SSE_MATH)) \ - || ((MODE) == DFmode && (!TARGET_SSE2 || !TARGET_SSE_MATH)) \ + (((MODE) == SFmode && !(TARGET_SSE && TARGET_SSE_MATH)) \ + || ((MODE) == DFmode && !(TARGET_SSE2 && TARGET_SSE_MATH)) \ || (MODE) == XFmode) /* Cover class containing the stack registers. */ @@ -979,8 +978,7 @@ enum target_cpu_default Actually there are no two word move instructions for consecutive registers. And only registers 0-3 may have mov byte instructions - applied to them. - */ + applied to them. */ #define HARD_REGNO_NREGS(REGNO, MODE) \ (FP_REGNO_P (REGNO) || SSE_REGNO_P (REGNO) || MMX_REGNO_P (REGNO) \ @@ -1187,7 +1185,8 @@ enum reg_class NON_Q_REGS, /* %esi %edi %ebp %esp */ INDEX_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp */ LEGACY_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp */ - GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp %r8 - %r15*/ + GENERAL_REGS, /* %eax %ebx %ecx %edx %esi %edi %ebp %esp + %r8 %r9 %r10 %r11 %r12 %r13 %r14 %r15 */ FP_TOP_REG, FP_SECOND_REG, /* %st(0) %st(1) */ FLOAT_REGS, SSE_FIRST_REG, @@ -1416,10 +1415,13 @@ enum reg_class /* On the 80386, this is the size of MODE in words, except in the FP regs, where a single reg is always enough. */ #define CLASS_MAX_NREGS(CLASS, MODE) \ - (!MAYBE_INTEGER_CLASS_P (CLASS) \ - ? (COMPLEX_MODE_P (MODE) ? 2 : 1) \ - : (((((MODE) == XFmode ? 12 : GET_MODE_SIZE (MODE))) \ - + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) + (MAYBE_INTEGER_CLASS_P (CLASS) \ + ? ((MODE) == XFmode \ + ? (TARGET_64BIT ? 2 : 3) \ + : (MODE) == XCmode \ + ? (TARGET_64BIT ? 4 : 6) \ + : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)) \ + : (COMPLEX_MODE_P (MODE) ? 2 : 1)) /* Return a class of registers that cannot change FROM mode to TO mode. */ @@ -1753,7 +1755,7 @@ typedef struct ix86_args { /* MOVE_MAX_PIECES is the number of bytes at a time which we can move efficiently, as opposed to MOVE_MAX which is the maximum number of bytes we can move with a single instruction. */ -#define MOVE_MAX_PIECES (TARGET_64BIT ? 8 : 4) +#define MOVE_MAX_PIECES UNITS_PER_WORD /* If a memory-to-memory move would take MOVE_RATIO or more simple move-instruction pairs, we will do a movmem or libcall instead. @@ -1998,18 +2000,12 @@ do { \ #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ ix86_output_addr_diff_elt ((FILE), (VALUE), (REL)) -/* When we see %v, we will print the 'v' prefix if TARGET_AVX is - true. */ +/* When we see %v, we will print the 'v' prefix if TARGET_AVX is true. */ #define ASM_OUTPUT_AVX_PREFIX(STREAM, PTR) \ { \ if ((PTR)[0] == '%' && (PTR)[1] == 'v') \ - { \ - if (TARGET_AVX) \ - (PTR) += 1; \ - else \ - (PTR) += 2; \ - } \ + (PTR) += TARGET_AVX ? 1 : 2; \ } /* A C statement or statements which output an assembler instruction