From patchwork Mon Jan 30 17:24:19 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Toma Tabacu X-Patchwork-Id: 721640 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3vBx8v4Wg5z9t5m for ; Tue, 31 Jan 2017 04:24:46 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="ATRoYyak"; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; q=dns; s=default; b=C6l waqBxDLy0KL2vol0OuBZUIM+dHqa2WE0rDrWukZxrkBEGv2ZzJPw5D8Vv/ao2JIJ f8J8A8FdiC4WwoZgzmyOwYLjxR7tFJduYFUUWX6663KHTzRJOQFi0y6ZIKXgdBAa BPegBK1iyxHscej3ZP65Jmoio2iSqSW7AuvjjT/c= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:content-type :content-transfer-encoding:mime-version; s=default; bh=jjb+OipBV SMajIJEUYf5y4f7Sl4=; b=ATRoYyakMuh/BunlTOtLOlmLFuuO8ltAO4/t22Ucw pRYTW58VQr5AeUIQvgRvxVYXKPQ+broL+8GKBq5qx7KqlETIRsYivnwF3d8vrqx+ gW30recUaxlpDKY3eBu9vpIzNecqoDU6PnHwAwF8aFqxoO7lDmqEdsE4P+Q+wWlu vM= Received: (qmail 30795 invoked by alias); 30 Jan 2017 17:24:29 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 23360 invoked by uid 89); 30 Jan 2017 17:24:24 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.1 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_NONE, RP_MATCHES_RCVD, SPF_PASS autolearn=ham version=3.3.2 spammy=insn_code, H*r:10.100.10, H*RU:14.03.0294.000, Hx-spam-relays-external:14.03.0294.000 X-HELO: mailapp01.imgtec.com Received: from mailapp01.imgtec.com (HELO mailapp01.imgtec.com) (195.59.15.196) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 30 Jan 2017 17:24:23 +0000 Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id 145B49E9FD403; Mon, 30 Jan 2017 17:24:17 +0000 (GMT) Received: from hhmail02.hh.imgtec.org ([fe80::5400:d33e:81a4:f775]) by HHMAIL01.hh.imgtec.org ([fe80::710b:f219:72bc:e0b3%26]) with mapi id 14.03.0294.000; Mon, 30 Jan 2017 17:24:20 +0000 From: Toma Tabacu To: "gcc-patches@gcc.gnu.org" CC: Matthew Fortune , "catherine_moore@mentor.com" Subject: [PATCH] MIPS: Fix mode mismatch error between Loongson builtin arguments and insn operands. Date: Mon, 30 Jan 2017 17:24:19 +0000 Message-ID: MIME-Version: 1.0 X-IsSubscribed: yes Hi, The builtins for the pshufh, psllh, psllw, psrah, psraw, psrlh, psrlw Loongson instructions have the third argument's type set to UQI while its corresponding insn operand is in SImode. This results in the following error when matching insn operands: ../gcc/gcc/include/loongson.h: In function 'test_psllw_s': ../gcc/gcc/include/loongson.h:483:10: error: invalid argument to built-in function return __builtin_loongson_psllw_s (s, amount); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ This causes the loongson-simd.c and loongson-shift-count-truncated-1.c tests to fail. This patch fixes this by wrapping the QImode builtin argument inside a paradoxical SUBREG with SImode, which will successfully match against the insn operand. Tested with mips-mti-elf. Regards, Toma gcc/ * config/mips/mips.c (mips_expand_builtin_insn): Put the QImode argument of the pshufh, psllh, psllw, psrah, psraw, psrlh, psrlw builtins into an SImode paradoxical SUBREG. diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index da7fa8f..f1ca6e2 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -16574,6 +16574,20 @@ mips_expand_builtin_insn (enum insn_code icode, unsigned int nops, switch (icode) { + /* The third argument needs to be in SImode in order to succesfully match + the operand from the insn definition. */ + case CODE_FOR_loongson_pshufh: + case CODE_FOR_loongson_psllh: + case CODE_FOR_loongson_psllw: + case CODE_FOR_loongson_psrah: + case CODE_FOR_loongson_psraw: + case CODE_FOR_loongson_psrlh: + case CODE_FOR_loongson_psrlw: + gcc_assert (has_target_p && nops == 3 && ops[2].mode == QImode); + ops[2].value = lowpart_subreg (SImode, ops[2].value, QImode); + ops[2].mode = SImode; + break; + case CODE_FOR_msa_addvi_b: case CODE_FOR_msa_addvi_h: case CODE_FOR_msa_addvi_w: