===================================================================
@@ -1,3 +1,12 @@
+2015-05-25 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r219717.
+ 2015-01-15 Jiong Wang <jiong.wang@arm.com>
+
+ PR rtl-optimization/64011
+ * expmed.c (store_bit_field_using_insv): Warn and truncate bitsize when
+ there is partial overflow.
And the second one:
===================================================================
@@ -1,3 +1,29 @@
+2015-05-26 y00166676 <felix.yang@huawei.com>
+
+ Backport from trunk r215046.
+ 2014-09-09 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR target/61749
+ * config/aarch64/aarch64-builtins.c (aarch64_types_quadop_qualifiers):
+ Use qualifier_immediate for last operand. Rename to...
+ (aarch64_types_ternop_lane_qualifiers): ... This.
+ (TYPES_QUADOP): Rename to...
+ (TYPES_TERNOP_LANE): ... This.
+ (aarch64_simd_expand_args): Return const0_rtx when encountering user
+ error. Change return of 0 to return of NULL_RTX.
+ (aarch64_crc32_expand_builtin): Likewise.
+ (aarch64_expand_builtin): Return NULL_RTX instead of 0.
+ ICE when expanding unknown builtin.
+ * config/aarch64/aarch64-simd-builtins.def (sqdmlal_lane): Use
+ TERNOP_LANE qualifiers.
+ (sqdmlsl_lane): Likewise.
+ (sqdmlal_laneq): Likewise.
+ (sqdmlsl_laneq): Likewise.
+ (sqdmlal2_lane): Likewise.
+ (sqdmlsl2_lane): Likewise.
+ (sqdmlal2_laneq): Likewise.
+ (sqdmlsl2_laneq): Likewise.
+
* gcc.target/aarch64/vqdml_lane_intrinsics-bad_1.c: New test.
Thanks for your attention,