diff mbox

[PR68432,09/22] Use code,alternative attributes for arm

Message ID 87y4dmgt2a.fsf@e105548-lin.cambridge.arm.com
State New
Headers show

Commit Message

Richard Sandiford Nov. 25, 2015, 12:30 p.m. UTC
Tested as described in the covering note.  I plan to commit this as obvious
if the prerequisites are approved.

gcc/
	* config/arm/arm.md (enabled_for_depr_it): Turn into a
	code,alternative attribute.
	(predicable_short_it, predicated, arch, arch_enabled): Likewise.
	(use_literal_pool, enabled): Likewise.
	* config/arm/types.md (type): Likewise.
diff mbox

Patch

diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md
index 8812d07..cff5de7 100644
--- a/gcc/config/arm/arm.md
+++ b/gcc/config/arm/arm.md
@@ -84,11 +84,15 @@ 
 ; We use this attribute to disable alternatives that can produce 32-bit
 ; instructions inside an IT-block in Thumb2 state.  ARMv8 deprecates IT blocks
 ; that contain 32-bit instructions.
-(define_attr "enabled_for_depr_it" "no,yes" (const_string "yes"))
+(define_attr "enabled_for_depr_it" "no,yes"
+  (const_string "yes")
+  "code,alternative")
 
 ; This attribute is used to disable a predicated alternative when we have
 ; arm_restrict_it.
-(define_attr "predicable_short_it" "no,yes" (const_string "yes"))
+(define_attr "predicable_short_it" "no,yes"
+  (const_string "yes")
+  "code,alternative")
 
 ;; Operand number of an input operand that is shifted.  Zero if the
 ;; given instruction does not shift one of its input operands.
@@ -108,7 +112,7 @@ 
 ; Predicated means that the insn form is conditionally executed based on a
 ; predicate.  We default to 'no' because no Thumb patterns match this rule
 ; and not all ARM insns do.
-(define_attr "predicated" "yes,no" (const_string "no"))
+(define_attr "predicated" "yes,no" (const_string "no") "code,alternative")
 
 ; LENGTH of an instruction (in bytes)
 (define_attr "length" ""
@@ -122,7 +126,8 @@ 
 ; used to compute attribute "enabled", use type "any" to enable an
 ; alternative in all cases.
 (define_attr "arch" "any,a,t,32,t1,t2,v6,nov6,v6t2,neon_for_64bits,avoid_neon_for_64bits,iwmmxt,iwmmxt2,armv6_or_vfpv3"
-  (const_string "any"))
+  (const_string "any")
+  "code,alternative")
 
 (define_attr "arch_enabled" "no,yes"
   (cond [(eq_attr "arch" "any")
@@ -179,7 +184,8 @@ 
 	 (const_string "yes")
 	]
 
-	(const_string "no")))
+	(const_string "no"))
+  "code,alternative")
 
 (define_attr "opt" "any,speed,size"
   (const_string "any"))
@@ -197,7 +203,9 @@ 
 	 (const_string "yes")]
 	(const_string "no")))
 
-(define_attr "use_literal_pool" "no,yes" (const_string "no"))
+(define_attr "use_literal_pool" "no,yes"
+  (const_string "no")
+  "code,alternative")
 
 ; Enable all alternatives that are both arch_enabled and insn_enabled.
 ; FIXME:: opt_enabled has been temporarily removed till the time we have
@@ -227,7 +235,8 @@ 
 
 	  (eq_attr "arch_enabled" "no")
 	  (const_string "no")]
-	 (const_string "yes")))
+	 (const_string "yes"))
+  "code,alternative")
 
 ; POOL_RANGE is how far away from a constant pool entry that this insn
 ; can be placed.  If the distance is zero, then this insn will never
diff --git a/gcc/config/arm/types.md b/gcc/config/arm/types.md
index 73f482d..91872a1 100644
--- a/gcc/config/arm/types.md
+++ b/gcc/config/arm/types.md
@@ -1069,7 +1069,8 @@ 
   crypto_sha1_slow,\
   crypto_sha256_fast,\
   crypto_sha256_slow"
-   (const_string "untyped"))
+   (const_string "untyped")
+   "code,alternative")
 
 ; Is this an (integer side) multiply with a 32-bit (or smaller) result?
 (define_attr "mul32" "no,yes"