===================================================================
@@ -3477,7 +3477,7 @@ lower-subreg.o : lower-subreg.c $(CONFIG
target-globals.o : target-globals.c $(CONFIG_H) $(SYSTEM_H) coretypes.h \
$(TM_H) $(MACHMODE_H) $(GGC_H) $(TOPLEV_H) target-globals.h $(FLAGS_H) \
$(FLAGS_H) $(REGS_H) $(RTL_H) reload.h expmed.h $(EXPR_H) $(OPTABS_H) libfuncs.h \
- $(CFGLOOP_H)
+ $(CFGLOOP_H) $(IRA_INT_H)
$(out_object_file): $(out_file) $(CONFIG_H) coretypes.h $(TM_H) $(TREE_H) \
$(RTL_H) $(REGS_H) hard-reg-set.h insn-config.h conditions.h \
===================================================================
@@ -564,9 +564,6 @@ struct ira_spilled_reg_stack_slot
extern int ira_reg_cost, ira_mem_cost;
extern int ira_load_cost, ira_store_cost, ira_shuffle_cost;
extern int ira_move_loops_num, ira_additional_jumps_num;
-
-/* Maximal value of element of array ira_reg_class_nregs. */
-extern int ira_max_nregs;
/* This page contains a bitset implementation called 'min/max sets' used to
record conflicts in IRA.
@@ -717,98 +714,140 @@ #define FOR_EACH_BIT_IN_MINMAX_SET(VEC,
minmax_set_iter_cond (&(ITER), &(N)); \
minmax_set_iter_next (&(ITER)))
-/* ira.c: */
+struct target_ira_int {
+ /* Hard registers that can not be used for the register allocator for
+ all functions of the current compilation unit. */
+ HARD_REG_SET x_no_unit_alloc_regs;
+
+ /* Map: hard regs X modes -> set of hard registers for storing value
+ of given mode starting with given hard register. */
+ HARD_REG_SET (x_ira_reg_mode_hard_regset
+ [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES]);
+
+ /* Array based on TARGET_REGISTER_MOVE_COST. Don't use
+ ira_register_move_cost directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_register_move_cost[MAX_MACHINE_MODE];
+
+ /* Similar to may_move_in_cost but it is calculated in IRA instead of
+ regclass. Another difference we take only available hard registers
+ into account to figure out that one register class is a subset of
+ the another one. Don't use it directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_may_move_in_cost[MAX_MACHINE_MODE];
+
+ /* Similar to may_move_out_cost but it is calculated in IRA instead of
+ regclass. Another difference we take only available hard registers
+ into account to figure out that one register class is a subset of
+ the another one. Don't use it directly. Use function of
+ ira_get_may_move_cost instead. */
+ move_table *x_ira_may_move_out_cost[MAX_MACHINE_MODE];
+
+ /* Register class subset relation: TRUE if the first class is a subset
+ of the second one considering only hard registers available for the
+ allocation. */
+ int x_ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* Array of the number of hard registers of given class which are
+ available for allocation. The order is defined by the the hard
+ register numbers. */
+ short x_ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* Index (in ira_class_hard_regs; for given register class and hard
+ register (in general case a hard register can belong to several
+ register classes;. The index is negative for hard registers
+ unavailable for the allocation. */
+ short x_ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* Array whose values are hard regset of hard registers available for
+ the allocation of given register class whose HARD_REGNO_MODE_OK
+ values for given mode are zero. */
+ HARD_REG_SET x_prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
+
+ /* The value is number of elements in the subsequent array. */
+ int x_ira_important_classes_num;
+
+ /* The array containing non-empty classes (including non-empty cover
+ classes; which are subclasses of cover classes. Such classes is
+ important for calculation of the hard register usage costs. */
+ enum reg_class x_ira_important_classes[N_REG_CLASSES];
+
+ /* The biggest important class inside of intersection of the two
+ classes (that is calculated taking only hard registers available
+ for allocation into account;. If the both classes contain no hard
+ registers available for allocation, the value is calculated with
+ taking all hard-registers including fixed ones into account. */
+ enum reg_class x_ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* True if the two classes (that is calculated taking only hard
+ registers available for allocation into account; are
+ intersected. */
+ bool x_ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* Classes with end marker LIM_REG_CLASSES which are intersected with
+ given class (the first index;. That includes given class itself.
+ This is calculated taking only hard registers available for
+ allocation into account. */
+ enum reg_class x_ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* The biggest important class inside of union of the two classes
+ (that is calculated taking only hard registers available for
+ allocation into account;. If the both classes contain no hard
+ registers available for allocation, the value is calculated with
+ taking all hard-registers including fixed ones into account. In
+ other words, the value is the corresponding reg_class_subunion
+ value. */
+ enum reg_class x_ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES];
+
+ /* For each reg class, table listing all the classes contained in it
+ (excluding the class itself. Non-allocatable registers are
+ excluded from the consideration;. */
+ enum reg_class x_alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+};
+
+extern struct target_ira_int default_target_ira_int;
+#if SWITCHABLE_TARGET
+extern struct target_ira_int *this_target_ira_int;
+#else
+#define this_target_ira_int (&default_target_ira_int)
+#endif
-/* Map: hard regs X modes -> set of hard registers for storing value
- of given mode starting with given hard register. */
-extern HARD_REG_SET ira_reg_mode_hard_regset
- [FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES];
-
-/* Array based on TARGET_REGISTER_MOVE_COST. Don't use
- ira_register_move_cost directly. Use function of
- ira_get_may_move_cost instead. */
-extern move_table *ira_register_move_cost[MAX_MACHINE_MODE];
-
-/* Similar to may_move_in_cost but it is calculated in IRA instead of
- regclass. Another difference we take only available hard registers
- into account to figure out that one register class is a subset of
- the another one. Don't use it directly. Use function of
- ira_get_may_move_cost instead. */
-extern move_table *ira_may_move_in_cost[MAX_MACHINE_MODE];
-
-/* Similar to may_move_out_cost but it is calculated in IRA instead of
- regclass. Another difference we take only available hard registers
- into account to figure out that one register class is a subset of
- the another one. Don't use it directly. Use function of
- ira_get_may_move_cost instead. */
-extern move_table *ira_may_move_out_cost[MAX_MACHINE_MODE];
-
-/* Register class subset relation: TRUE if the first class is a subset
- of the second one considering only hard registers available for the
- allocation. */
-extern int ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
-
-/* Array of the number of hard registers of given class which are
- available for allocation. The order is defined by the the hard
- register numbers. */
-extern short ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* Index (in ira_class_hard_regs) for given register class and hard
- register (in general case a hard register can belong to several
- register classes). The index is negative for hard registers
- unavailable for the allocation. */
-extern short ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* Array whose values are hard regset of hard registers available for
- the allocation of given register class whose HARD_REGNO_MODE_OK
- values for given mode are zero. */
-extern HARD_REG_SET prohibited_class_mode_regs
- [N_REG_CLASSES][NUM_MACHINE_MODES];
+#define ira_reg_mode_hard_regset \
+ (this_target_ira_int->x_ira_reg_mode_hard_regset)
+#define ira_register_move_cost \
+ (this_target_ira_int->x_ira_register_move_cost)
+#define ira_may_move_in_cost \
+ (this_target_ira_int->x_ira_may_move_in_cost)
+#define ira_may_move_out_cost \
+ (this_target_ira_int->x_ira_may_move_out_cost)
+#define ira_class_subset_p \
+ (this_target_ira_int->x_ira_class_subset_p)
+#define ira_non_ordered_class_hard_regs \
+ (this_target_ira_int->x_ira_non_ordered_class_hard_regs)
+#define ira_class_hard_reg_index \
+ (this_target_ira_int->x_ira_class_hard_reg_index)
+#define prohibited_class_mode_regs \
+ (this_target_ira_int->x_prohibited_class_mode_regs)
+#define ira_important_classes_num \
+ (this_target_ira_int->x_ira_important_classes_num)
+#define ira_important_classes \
+ (this_target_ira_int->x_ira_important_classes)
+#define ira_reg_class_intersect \
+ (this_target_ira_int->x_ira_reg_class_intersect)
+#define ira_reg_classes_intersect_p \
+ (this_target_ira_int->x_ira_reg_classes_intersect_p)
+#define ira_reg_class_super_classes \
+ (this_target_ira_int->x_ira_reg_class_super_classes)
+#define ira_reg_class_union \
+ (this_target_ira_int->x_ira_reg_class_union)
+
+/* ira.c: */
/* Array whose values are hard regset of hard registers for which
move of the hard register in given mode into itself is
prohibited. */
extern HARD_REG_SET ira_prohibited_mode_move_regs[NUM_MACHINE_MODES];
-/* The value is number of elements in the subsequent array. */
-extern int ira_important_classes_num;
-
-/* The array containing non-empty classes (including non-empty cover
- classes) which are subclasses of cover classes. Such classes is
- important for calculation of the hard register usage costs. */
-extern enum reg_class ira_important_classes[N_REG_CLASSES];
-
-/* The array containing indexes of important classes in the previous
- array. The array elements are defined only for important
- classes. */
-extern int ira_important_class_nums[N_REG_CLASSES];
-
-/* The biggest important class inside of intersection of the two
- classes (that is calculated taking only hard registers available
- for allocation into account). If the both classes contain no hard
- registers available for allocation, the value is calculated with
- taking all hard-registers including fixed ones into account. */
-extern enum reg_class ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
-
-/* True if the two classes (that is calculated taking only hard
- registers available for allocation into account) are
- intersected. */
-extern bool ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
-
-/* Classes with end marker LIM_REG_CLASSES which are intersected with
- given class (the first index). That includes given class itself.
- This is calculated taking only hard registers available for
- allocation into account. */
-extern enum reg_class ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
-/* The biggest important class inside of union of the two classes
- (that is calculated taking only hard registers available for
- allocation into account). If the both classes contain no hard
- registers available for allocation, the value is calculated with
- taking all hard-registers including fixed ones into account. In
- other words, the value is the corresponding reg_class_subunion
- value. */
-extern enum reg_class ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES];
-
extern void *ira_allocate (size_t);
extern void *ira_reallocate (void *, size_t);
extern void ira_free (void *addr);
===================================================================
@@ -20,36 +20,6 @@ Software Foundation; either version 3, o
along with GCC; see the file COPYING3. If not see
<http://www.gnu.org/licenses/>. */
-/* Number of given class hard registers available for the register
- allocation for given classes. */
-extern int ira_available_class_regs[N_REG_CLASSES];
-
-/* Map: hard register number -> cover class it belongs to. If the
- corresponding class is NO_REGS, the hard register is not available
- for allocation. */
-extern enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
-
-/* Number of cover classes. Cover classes is non-intersected register
- classes containing all hard-registers available for the
- allocation. */
-extern int ira_reg_class_cover_size;
-
-/* The array containing cover classes (see also comments for macro
- IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
- used for this. */
-extern enum reg_class ira_reg_class_cover[N_REG_CLASSES];
-
-/* Map of all register classes to corresponding cover class containing
- the given class. If given class is not a subset of a cover class,
- we translate it into the cheapest cover class. */
-extern enum reg_class ira_class_translate[N_REG_CLASSES];
-
-/* Map: register class x machine mode -> number of hard registers of
- given class needed to store value of given mode. If the number for
- some hard-registers of the register class is different, the size
- will be negative. */
-extern int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
-
/* Function specific hard registers can not be used for the register
allocation. */
extern HARD_REG_SET ira_no_alloc_regs;
@@ -58,17 +28,75 @@ Software Foundation; either version 3, o
mode or when the conflict table is too big. */
extern bool ira_conflicts_p;
-/* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */
-extern short ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
-
-/* Array of number of hard registers of given class which are
- available for the allocation. The order is defined by the
- allocation order. */
-extern short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* The number of elements of the above array for given register
- class. */
-extern int ira_class_hard_regs_num[N_REG_CLASSES];
+struct target_ira {
+ /* Number of given class hard registers available for the register
+ allocation for given classes. */
+ int x_ira_available_class_regs[N_REG_CLASSES];
+
+ /* Map: hard register number -> cover class it belongs to. If the
+ corresponding class is NO_REGS, the hard register is not available
+ for allocation. */
+ enum reg_class x_ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
+
+ /* Number of cover classes. Cover classes is non-intersected register
+ classes containing all hard-registers available for the
+ allocation. */
+ int x_ira_reg_class_cover_size;
+
+ /* The array containing cover classes (see also comments for macro
+ IRA_COVER_CLASSES;. Only first IRA_REG_CLASS_COVER_SIZE elements are
+ used for this. */
+ enum reg_class x_ira_reg_class_cover[N_REG_CLASSES];
+
+ /* Map of all register classes to corresponding cover class containing
+ the given class. If given class is not a subset of a cover class,
+ we translate it into the cheapest cover class. */
+ enum reg_class x_ira_class_translate[N_REG_CLASSES];
+
+ /* Map: register class x machine mode -> number of hard registers of
+ given class needed to store value of given mode. If the number for
+ some hard-registers of the register class is different, the size
+ will be negative. */
+ int x_ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
+
+ /* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */
+ short x_ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
+
+ /* Array of number of hard registers of given class which are
+ available for the allocation. The order is defined by the
+ allocation order. */
+ short x_ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+
+ /* The number of elements of the above array for given register
+ class. */
+ int x_ira_class_hard_regs_num[N_REG_CLASSES];
+};
+
+extern struct target_ira default_target_ira;
+#if SWITCHABLE_TARGET
+extern struct target_ira *this_target_ira;
+#else
+#define this_target_ira (&default_target_ira)
+#endif
+
+#define ira_available_class_regs \
+ (this_target_ira->x_ira_available_class_regs)
+#define ira_hard_regno_cover_class \
+ (this_target_ira->x_ira_hard_regno_cover_class)
+#define ira_reg_class_cover_size \
+ (this_target_ira->x_ira_reg_class_cover_size)
+#define ira_reg_class_cover \
+ (this_target_ira->x_ira_reg_class_cover)
+#define ira_class_translate \
+ (this_target_ira->x_ira_class_translate)
+#define ira_reg_class_nregs \
+ (this_target_ira->x_ira_reg_class_nregs)
+#define ira_memory_move_cost \
+ (this_target_ira->x_ira_memory_move_cost)
+#define ira_class_hard_regs \
+ (this_target_ira->x_ira_class_hard_regs)
+#define ira_class_hard_regs_num \
+ (this_target_ira->x_ira_class_hard_regs_num)
extern void ira_init_once (void);
extern void ira_init (void);
===================================================================
@@ -325,6 +325,13 @@ Software Foundation; either version 3, o
#include "ira-int.h"
+struct target_ira default_target_ira;
+struct target_ira_int default_target_ira_int;
+#if SWITCHABLE_TARGET
+struct target_ira *this_target_ira;
+struct target_ira_int *this_target_ira_int;
+#endif
+
/* A modified value of flag `-fira-verbose' used internally. */
int internal_flag_ira_verbose;
@@ -351,33 +358,6 @@ struct ira_spilled_reg_stack_slot *ira_s
HARD_REG_SET eliminable_regset;
-/* Map: hard regs X modes -> set of hard registers for storing value
- of given mode starting with given hard register. */
-HARD_REG_SET ira_reg_mode_hard_regset[FIRST_PSEUDO_REGISTER][NUM_MACHINE_MODES];
-
-/* Array analogous to target hook TARGET_MEMORY_MOVE_COST. */
-short int ira_memory_move_cost[MAX_MACHINE_MODE][N_REG_CLASSES][2];
-
-/* Array based on TARGET_REGISTER_MOVE_COST. */
-move_table *ira_register_move_cost[MAX_MACHINE_MODE];
-
-/* Similar to may_move_in_cost but it is calculated in IRA instead of
- regclass. Another difference is that we take only available hard
- registers into account to figure out that one register class is a
- subset of the another one. */
-move_table *ira_may_move_in_cost[MAX_MACHINE_MODE];
-
-/* Similar to may_move_out_cost but it is calculated in IRA instead of
- regclass. Another difference is that we take only available hard
- registers into account to figure out that one register class is a
- subset of the another one. */
-move_table *ira_may_move_out_cost[MAX_MACHINE_MODE];
-
-/* Register class subset relation: TRUE if the first class is a subset
- of the second one considering only hard registers available for the
- allocation. */
-int ira_class_subset_p[N_REG_CLASSES][N_REG_CLASSES];
-
/* Temporary hard reg set used for a different calculation. */
static HARD_REG_SET temp_hard_regset;
@@ -401,30 +381,8 @@ setup_reg_mode_hard_regset (void)
}
-
-/* Hard registers that can not be used for the register allocator for
- all functions of the current compilation unit. */
-static HARD_REG_SET no_unit_alloc_regs;
-
-/* Array of the number of hard registers of given class which are
- available for allocation. The order is defined by the
- allocation order. */
-short ira_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* Array of the number of hard registers of given class which are
- available for allocation. The order is defined by the
- the hard register numbers. */
-short ira_non_ordered_class_hard_regs[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
-
-/* The number of elements of the above array for given register
- class. */
-int ira_class_hard_regs_num[N_REG_CLASSES];
-
-/* Index (in ira_class_hard_regs) for given register class and hard
- register (in general case a hard register can belong to several
- register classes). The index is negative for hard registers
- unavailable for the allocation. */
-short ira_class_hard_reg_index[N_REG_CLASSES][FIRST_PSEUDO_REGISTER];
+#define no_unit_alloc_regs \
+ (this_target_ira_int->x_no_unit_alloc_regs)
/* The function sets up the three arrays declared above. */
static void
@@ -470,10 +428,6 @@ setup_class_hard_regs (void)
}
}
-/* Number of given class hard registers available for the register
- allocation for given classes. */
-int ira_available_class_regs[N_REG_CLASSES];
-
/* Set up IRA_AVAILABLE_CLASS_REGS. */
static void
setup_available_class_regs (void)
@@ -666,11 +620,8 @@ ira_debug_disposition (void)
}
-
-/* For each reg class, table listing all the classes contained in it
- (excluding the class itself. Non-allocatable registers are
- excluded from the consideration). */
-static enum reg_class alloc_reg_class_subclasses[N_REG_CLASSES][N_REG_CLASSES];
+#define alloc_reg_class_subclasses \
+ (this_target_ira_int->x_alloc_reg_class_subclasses)
/* Initialize the table of subclasses of each reg class. */
static void
@@ -711,29 +662,6 @@ setup_reg_subclasses (void)
-/* Number of cover classes. Cover classes is non-intersected register
- classes containing all hard-registers available for the
- allocation. */
-int ira_reg_class_cover_size;
-
-/* The array containing cover classes (see also comments for macro
- IRA_COVER_CLASSES). Only first IRA_REG_CLASS_COVER_SIZE elements are
- used for this. */
-enum reg_class ira_reg_class_cover[N_REG_CLASSES];
-
-/* The number of elements in the subsequent array. */
-int ira_important_classes_num;
-
-/* The array containing non-empty classes (including non-empty cover
- classes) which are subclasses of cover classes. Such classes is
- important for calculation of the hard register usage costs. */
-enum reg_class ira_important_classes[N_REG_CLASSES];
-
-/* The array containing indexes of important classes in the previous
- array. The array elements are defined only for important
- classes. */
-int ira_important_class_nums[N_REG_CLASSES];
-
/* Set the four global variables defined above. */
static void
setup_cover_and_important_classes (void)
@@ -838,11 +766,6 @@ setup_cover_and_important_classes (void)
= ira_reg_class_cover[j];
}
-/* Map of all register classes to corresponding cover class containing
- the given class. If given class is not a subset of a cover class,
- we translate it into the cheapest cover class. */
-enum reg_class ira_class_translate[N_REG_CLASSES];
-
/* Set up array IRA_CLASS_TRANSLATE. */
static void
setup_class_translate (void)
@@ -931,7 +854,8 @@ setup_class_translate (void)
}
/* Order numbers of cover classes in original target cover class
- array, -1 for non-cover classes. */
+ array, -1 for non-cover classes. This is only live during
+ reorder_important_classes. */
static int cover_class_order[N_REG_CLASSES];
/* The function used to sort the important classes. */
@@ -951,7 +875,7 @@ comp_reg_classes_func (const void *v1p,
}
/* Reorder important classes according to the order of their cover
- classes. Set up array ira_important_class_nums too. */
+ classes. */
static void
reorder_important_classes (void)
{
@@ -963,38 +887,8 @@ reorder_important_classes (void)
cover_class_order[ira_reg_class_cover[i]] = i;
qsort (ira_important_classes, ira_important_classes_num,
sizeof (enum reg_class), comp_reg_classes_func);
- for (i = 0; i < ira_important_classes_num; i++)
- ira_important_class_nums[ira_important_classes[i]] = i;
}
-/* The biggest important reg_class inside of intersection of the two
- reg_classes (that is calculated taking only hard registers
- available for allocation into account). If the both reg_classes
- contain no hard registers available for allocation, the value is
- calculated by taking all hard-registers including fixed ones into
- account. */
-enum reg_class ira_reg_class_intersect[N_REG_CLASSES][N_REG_CLASSES];
-
-/* True if the two classes (that is calculated taking only hard
- registers available for allocation into account) are
- intersected. */
-bool ira_reg_classes_intersect_p[N_REG_CLASSES][N_REG_CLASSES];
-
-/* Important classes with end marker LIM_REG_CLASSES which are
- supersets with given important class (the first index). That
- includes given class itself. This is calculated taking only hard
- registers available for allocation into account. */
-enum reg_class ira_reg_class_super_classes[N_REG_CLASSES][N_REG_CLASSES];
-
-/* The biggest important reg_class inside of union of the two
- reg_classes (that is calculated taking only hard registers
- available for allocation into account). If the both reg_classes
- contain no hard registers available for allocation, the value is
- calculated by taking all hard-registers including fixed ones into
- account. In other words, the value is the corresponding
- reg_class_subunion value. */
-enum reg_class ira_reg_class_union[N_REG_CLASSES][N_REG_CLASSES];
-
/* Set up the above reg class relations. */
static void
setup_reg_class_relations (void)
@@ -1137,11 +1031,6 @@ find_reg_class_closure (void)
-/* Map: hard register number -> cover class it belongs to. If the
- corresponding class is NO_REGS, the hard register is not available
- for allocation. */
-enum reg_class ira_hard_regno_cover_class[FIRST_PSEUDO_REGISTER];
-
/* Set up the array above. */
static void
setup_hard_regno_cover_class (void)
@@ -1167,38 +1056,20 @@ setup_hard_regno_cover_class (void)
-/* Map: register class x machine mode -> number of hard registers of
- given class needed to store value of given mode. If the number is
- different, the size will be negative. */
-int ira_reg_class_nregs[N_REG_CLASSES][MAX_MACHINE_MODE];
-
-/* Maximal value of the previous array elements. */
-int ira_max_nregs;
-
/* Form IRA_REG_CLASS_NREGS map. */
static void
setup_reg_class_nregs (void)
{
int cl, m;
- ira_max_nregs = -1;
for (cl = 0; cl < N_REG_CLASSES; cl++)
for (m = 0; m < MAX_MACHINE_MODE; m++)
- {
- ira_reg_class_nregs[cl][m] = CLASS_MAX_NREGS ((enum reg_class) cl,
- (enum machine_mode) m);
- if (ira_max_nregs < ira_reg_class_nregs[cl][m])
- ira_max_nregs = ira_reg_class_nregs[cl][m];
- }
+ ira_reg_class_nregs[cl][m] = CLASS_MAX_NREGS ((enum reg_class) cl,
+ (enum machine_mode) m);
}
-/* Array whose values are hard regset of hard registers available for
- the allocation of given register class whose HARD_REGNO_MODE_OK
- values for given mode are zero. */
-HARD_REG_SET prohibited_class_mode_regs[N_REG_CLASSES][NUM_MACHINE_MODES];
-
/* Set up PROHIBITED_CLASS_MODE_REGS. */
static void
setup_prohibited_class_mode_regs (void)
===================================================================
@@ -30,6 +30,8 @@ #define TARGET_GLOBALS_H 1
extern struct target_optabs *this_target_optabs;
extern struct target_libfuncs *this_target_libfuncs;
extern struct target_cfgloop *this_target_cfgloop;
+extern struct target_ira *this_target_ira;
+extern struct target_ira_int *this_target_ira_int;
struct GTY(()) target_globals {
struct target_flag_state *GTY((skip)) flag_state;
@@ -41,6 +43,8 @@ struct GTY(()) target_globals {
struct target_optabs *GTY((skip)) optabs;
struct target_libfuncs *libfuncs;
struct target_cfgloop *GTY((skip)) cfgloop;
+ struct target_ira *GTY((skip)) ira;
+ struct target_ira_int *GTY((skip)) ira_int;
};
extern struct target_globals default_target_globals;
@@ -59,6 +63,8 @@ restore_target_globals (struct target_gl
this_target_optabs = g->optabs;
this_target_libfuncs = g->libfuncs;
this_target_cfgloop = g->cfgloop;
+ this_target_ira = g->ira;
+ this_target_ira_int = g->ira_int;
}
#endif
===================================================================
@@ -35,6 +35,7 @@ Software Foundation; either version 3, o
#include "optabs.h"
#include "libfuncs.h"
#include "cfgloop.h"
+#include "ira-int.h"
#if SWITCHABLE_TARGET
struct target_globals default_target_globals = {
@@ -46,7 +47,9 @@ struct target_globals default_target_glo
&default_target_expmed,
&default_target_optabs,
&default_target_libfuncs,
- &default_target_cfgloop
+ &default_target_cfgloop,
+ &default_target_ira,
+ &default_target_ira_int
};
struct target_globals *
@@ -64,6 +67,8 @@ save_target_globals (void)
g->optabs = XCNEW (struct target_optabs);
g->libfuncs = ggc_alloc_cleared_target_libfuncs ();
g->cfgloop = XCNEW (struct target_cfgloop);
+ g->ira = XCNEW (struct target_ira);
+ g->ira_int = XCNEW (struct target_ira_int);
restore_target_globals (g);
target_reinit ();
return g;