From patchwork Wed Feb 19 15:35:04 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 321955 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 9EEED2C00BE for ; Thu, 20 Feb 2014 02:35:19 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; q=dns; s=default; b=q6mL/DIzK8pN5BZoO9Pe1tOk5htQXMDizItUhbTvnSUOVrPpZM 6t65FwqDPXdxCrqNxZCjH4vY3JpTEjX2JqAhu6p2Pn35pMoUGa0b0SNrdcWHOPbw jqv/ZkegRAff/WQPp2UP3l2dA2l0hn++jtwI2UJld1iBqVlXkm6EZn6YM= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:cc:subject:date:message-id:mime-version:content-type; s= default; bh=UfMVXYKNXC5wbhCSmE4or9VYbGI=; b=feeq04ikt2dQB7WVHUHK NKkyiyDW04gR9IUoSOX/FH3s/6o4BqJLjZxNYZ0dowrCTmFoXQL6SrNJnnTgVdcV R29Fx5qdaOY1D6EhwRwf+FzOoo0uQql7Bhhbwy7QhMdBBc6a9CGCXOyMppx0DvqD LF/fkT2TNC84UjF3Q4Pe4CM= Received: (qmail 9841 invoked by alias); 19 Feb 2014 15:35:12 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 9830 invoked by uid 89); 19 Feb 2014 15:35:12 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RCVD_IN_SEMBACKSCATTER, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: e06smtp15.uk.ibm.com Received: from e06smtp15.uk.ibm.com (HELO e06smtp15.uk.ibm.com) (195.75.94.111) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-SHA encrypted) ESMTPS; Wed, 19 Feb 2014 15:35:11 +0000 Received: from /spool/local by e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 19 Feb 2014 15:35:06 -0000 Received: from b06cxnps4076.portsmouth.uk.ibm.com (d06relay13.portsmouth.uk.ibm.com [9.149.109.198]) by d06dlp01.portsmouth.uk.ibm.com (Postfix) with ESMTP id ABBA317D805A for ; Wed, 19 Feb 2014 15:35:35 +0000 (GMT) Received: from d06av10.portsmouth.uk.ibm.com (d06av10.portsmouth.uk.ibm.com [9.149.37.251]) by b06cxnps4076.portsmouth.uk.ibm.com (8.13.8/8.13.8/NCO v10.0) with ESMTP id s1JFYrOU852388 for ; Wed, 19 Feb 2014 15:34:53 GMT Received: from d06av10.portsmouth.uk.ibm.com (localhost [127.0.0.1]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id s1JFZ5xT000657 for ; Wed, 19 Feb 2014 08:35:05 -0700 Received: from sandifor-thinkpad.stglab.manchester.uk.ibm.com (sandifor-thinkpad.manchester-maybrook.uk.ibm.com [9.174.219.98]) by d06av10.portsmouth.uk.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id s1JFZ4GO000626 (version=TLSv1/SSLv3 cipher=AES128-GCM-SHA256 bits=128 verify=NO); Wed, 19 Feb 2014 08:35:04 -0700 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, Andreas.Krebbel@de.ibm.com, uweigand@de.ibm.com, rsandifo@linux.vnet.ibm.com Cc: Andreas.Krebbel@de.ibm.com, uweigand@de.ibm.com Subject: [S390] Fix scheduling performance regression from my shrink-wrap patches Date: Wed, 19 Feb 2014 15:35:04 +0000 Message-ID: <87ppmji09j.fsf@sandifor-thinkpad.stglab.manchester.uk.ibm.com> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 14021915-0342-0000-0000-000007D85685 In the covering message for the shrink-wrap patch I said: Perhaps the only subtle thing is the handling of call-clobbered base registers. The idea is to emit the initialising main_pool pattern in both early_mach -- at the very beginning of the function -- and in the prologue. Then, if shrink-wrapping is used, the one added by early_mach will still be the first in the function. If shrink-wrapping isn't used then the one added by the prologue will be the first in the function. s390_mainpool_start then deletes whichever isn't needed. And as so often, the "subtle" bit wasn't really well thought out. Having an extra unspec_volatile main_pool instruction until md_reorg unnecessarily constrained the second scheduling pass. This caused a regression in some internal benchmarking. When the base register is call-clobbered and can be set and used anywhere in the function, there's no real need to emit it before md_reorg. The patch below therefore defers it until then. Tested on s390x-linux-gnu. OK to install? Thanks, Richard gcc/ * config/s390/s390.c (s390_mainpool_start): Emit the main_pool instruction at the start of the function if the base register is call-clobbered. Revert 2014-02-07 change. (s390_early_mach): Don't initialize the base register here. (s390_emit_prologue): Only initialize the base register if it is call-saved. (s300_extra_live_on_entry): New function. (TARGET_EXTRA_LIVE_ON_ENTRY): Define. Index: gcc/config/s390/s390.c =================================================================== --- gcc/config/s390/s390.c 2014-02-07 14:56:19.205859847 +0000 +++ gcc/config/s390/s390.c 2014-02-13 12:49:55.756293247 +0000 @@ -6668,20 +6668,21 @@ s390_mainpool_start (void) for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) { + /* If the base register is call-clobbered, output the initializing + instruction at the start of the function. */ + if (!pool->pool_insn + && NONDEBUG_INSN_P (insn) + && cfun->machine->base_reg + && call_really_used_regs[REGNO (cfun->machine->base_reg)]) + pool->pool_insn + = emit_insn_before (gen_main_pool (cfun->machine->base_reg), insn); + if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SET && GET_CODE (SET_SRC (PATTERN (insn))) == UNSPEC_VOLATILE && XINT (SET_SRC (PATTERN (insn)), 1) == UNSPECV_MAIN_POOL) { - /* There might be two main_pool instructions if base_reg - is call-clobbered; one for shrink-wrapped code and one - for the rest. We want to keep the first. */ - if (pool->pool_insn) - { - insn = PREV_INSN (insn); - delete_insn (NEXT_INSN (insn)); - continue; - } + gcc_assert (!pool->pool_insn); pool->pool_insn = insn; } @@ -8643,11 +8644,6 @@ s390_early_mach (void) /* Re-compute register info. */ s390_register_info (); - /* If we're using a base register, ensure that it is always valid for - the first non-prologue instruction. */ - if (cfun->machine->base_reg) - emit_insn_at_entry (gen_main_pool (cfun->machine->base_reg)); - /* Annotate all constant pool references to let the scheduler know they implicitly use the base register. */ for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) @@ -8728,7 +8724,8 @@ s390_emit_prologue (void) /* Dummy insn to mark literal pool slot. */ - if (cfun->machine->base_reg) + if (cfun->machine->base_reg + && !call_really_used_regs[REGNO (cfun->machine->base_reg)]) emit_insn (gen_main_pool (cfun->machine->base_reg)); offset = cfun_frame_layout.f0_offset; @@ -9183,6 +9180,19 @@ s390_emit_epilogue (bool sibcall) } } +/* Implement TARGET_EXTRA_LIVE_ON_ENTRY. */ + +static void +s300_extra_live_on_entry (bitmap regs) +{ + /* If the base register is call-clobbered, the main_pool instruction + should go at the beginning of the function. We only add it during + md_reorg. */ + if (cfun->machine->base_reg + && call_really_used_regs[REGNO (cfun->machine->base_reg)]) + bitmap_set_bit (regs, REGNO (cfun->machine->base_reg)); +} + /* Implement TARGET_SET_UP_BY_PROLOGUE. */ static void @@ -12230,6 +12240,9 @@ #define TARGET_ATTRIBUTE_TABLE s390_attr #undef TARGET_CAN_INLINE_P #define TARGET_CAN_INLINE_P s390_can_inline_p +#undef TARGET_EXTRA_LIVE_ON_ENTRY +#define TARGET_EXTRA_LIVE_ON_ENTRY s300_extra_live_on_entry + #undef TARGET_SET_UP_BY_PROLOGUE #define TARGET_SET_UP_BY_PROLOGUE s300_set_up_by_prologue