From patchwork Tue Jun 30 20:56:02 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 489811 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id ACE161402A1 for ; Wed, 1 Jul 2015 06:56:17 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=EaM1jxL/; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; q=dns; s=default; b=SN0PDN/3DneYjI/5 InzxpNkh5YfKq40VOav55p2AZ8AlXMQ3izarOZKkk33c+OmmNvY2QZG432nQU6vc qdjv9/qqy60NEUtqcHreQCvHy1MQVTfiCI0IegdY/q1taWtL2wwOq0aVA0Bpk5Hi ENGpoR2sxSOHaHJI9Hn6ZWSJ3qs= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type :content-transfer-encoding; s=default; bh=/kiXq4KzbCVZ2mgLELqzAY AkhcQ=; b=EaM1jxL/Pxee3+ZviI1Nb3b9fryEt/F57xRi7DaDGxel5iQmGQXcCu 2eXRlTQQywxym3yi5kqDEpx+PghJJ1rZFFXstGfvK2ucbULl4WSTYnOAvdMbPoZR Xaj9PBvTDSbRv7w9KLc6hHoQVYhChP0OtgMg6ASYTyun6NA1rJx4g= Received: (qmail 71693 invoked by alias); 30 Jun 2015 20:56:09 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 71683 invoked by uid 89); 30 Jun 2015 20:56:09 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.2 required=5.0 tests=AWL, BAYES_40, KAM_ASCII_DIVIDERS, SPF_PASS autolearn=no version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (207.82.80.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 30 Jun 2015 20:56:07 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-20-qoBPdFnZQtSTMlzYPvaBig-1 Received: from localhost ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Tue, 30 Jun 2015 21:56:02 +0100 From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@arm.com Subject: [committed] Use target-insns.def for memory fences & barriers Date: Tue, 30 Jun 2015 21:56:02 +0100 Message-ID: <87pp4coqzh.fsf@e105548-lin.cambridge.arm.com> User-Agent: Gnus/5.130012 (Ma Gnus v0.12) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 X-MC-Unique: qoBPdFnZQtSTMlzYPvaBig-1 Bootstrapped & regression-tested on x86_64-linux-gnu and aarch64-linux-gnu. Also tested via config-list.mk. Committed as preapproved. Thanks, Richard gcc/ * defaults.h (HAVE_mem_thread_fence, gen_mem_thread_fence) (HAVE_memory_barrier, gen_memory_barrier, HAVE_mem_signal_fence) (gen_mem_signal_fence): Delete. * target-insns.def (mem_signal_fence, mem_thread_fence) (memory_barrier): New targetm instruction patterns. * optabs.c (expand_mem_thread_fence): Use them instead of HAVE_*/gen_* interface. (expand_mem_signal_fence): Likewise. Index: gcc/defaults.h =================================================================== --- gcc/defaults.h 2015-06-30 21:55:27.731812511 +0100 +++ gcc/defaults.h 2015-06-30 21:55:27.723812601 +0100 @@ -1426,36 +1426,6 @@ #define STACK_CHECK_MAX_VAR_SIZE (STACK_ #define TARGET_VTABLE_USES_DESCRIPTORS 0 #endif -#ifndef HAVE_mem_thread_fence -#define HAVE_mem_thread_fence 0 -static inline rtx -gen_mem_thread_fence (rtx) -{ - gcc_unreachable (); - return NULL; -} -#endif - -#ifndef HAVE_memory_barrier -#define HAVE_memory_barrier 0 -static inline rtx -gen_memory_barrier () -{ - gcc_unreachable (); - return NULL; -} -#endif - -#ifndef HAVE_mem_signal_fence -#define HAVE_mem_signal_fence 0 -static inline rtx -gen_mem_signal_fence (rtx) -{ - gcc_unreachable (); - return NULL; -} -#endif - #ifndef HAVE_load_multiple #define HAVE_load_multiple 0 static inline rtx Index: gcc/target-insns.def =================================================================== --- gcc/target-insns.def 2015-06-30 21:55:27.731812511 +0100 +++ gcc/target-insns.def 2015-06-30 21:55:27.723812601 +0100 @@ -32,6 +32,9 @@ Instructions should be documented in md.texi rather than here. */ DEF_TARGET_INSN (canonicalize_funcptr_for_compare, (rtx x0, rtx x1)) DEF_TARGET_INSN (epilogue, (void)) +DEF_TARGET_INSN (mem_signal_fence, (rtx x0)) +DEF_TARGET_INSN (mem_thread_fence, (rtx x0)) +DEF_TARGET_INSN (memory_barrier, (void)) DEF_TARGET_INSN (prologue, (void)) DEF_TARGET_INSN (return, (void)) DEF_TARGET_INSN (sibcall_epilogue, (void)) Index: gcc/optabs.c =================================================================== --- gcc/optabs.c 2015-06-30 21:55:27.731812511 +0100 +++ gcc/optabs.c 2015-06-30 21:55:27.723812601 +0100 @@ -7575,12 +7575,12 @@ expand_asm_memory_barrier (void) void expand_mem_thread_fence (enum memmodel model) { - if (HAVE_mem_thread_fence) - emit_insn (gen_mem_thread_fence (GEN_INT (model))); + if (targetm.have_mem_thread_fence ()) + emit_insn (targetm.gen_mem_thread_fence (GEN_INT (model))); else if (!is_mm_relaxed (model)) { - if (HAVE_memory_barrier) - emit_insn (gen_memory_barrier ()); + if (targetm.have_memory_barrier ()) + emit_insn (targetm.gen_memory_barrier ()); else if (synchronize_libfunc != NULL_RTX) emit_library_call (synchronize_libfunc, LCT_NORMAL, VOIDmode, 0); else @@ -7594,8 +7594,8 @@ expand_mem_thread_fence (enum memmodel m void expand_mem_signal_fence (enum memmodel model) { - if (HAVE_mem_signal_fence) - emit_insn (gen_mem_signal_fence (GEN_INT (model))); + if (targetm.have_mem_signal_fence ()) + emit_insn (targetm.gen_mem_signal_fence (GEN_INT (model))); else if (!is_mm_relaxed (model)) { /* By default targets are coherent between a thread and the signal