From patchwork Tue Apr 8 17:51:29 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Sandiford X-Patchwork-Id: 337711 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8A3961400E2 for ; Wed, 9 Apr 2014 03:51:42 +1000 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; q=dns; s= default; b=DoYLJvjhEBOrgmtaWVgzkcZbpUb039/4p6wORXX28GDYzVymQe9G7 MCkS63bK89uWLxDUNJocIlJkBiBkRF9LG55vLsqbhysxOC554KfdVx6kH26h9CNj d295tbzKAoYYqIAvRyQQfQk2YHjXJr120ebTXYokxjSLFpZb2PLau4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:from :to:subject:date:message-id:mime-version:content-type; s= default; bh=eeQyDpcul41JYnMYmWneaBI9WWc=; b=BwskwcMSNsADpfRlsms9 k2AtUVfrmcul70W26l9Fj5H1leXMN7HloJI1GaFHdlCfkr5+Tw3rIjxWMsesaxF5 ydaOABMPvovTkcz8XjL7xA9rM+JE8ruYljBvyVHo4dJ9fLYgPROX6iMlRJlIgAYR aChdKhgcO+tLNdkOgQFNwlA= Received: (qmail 28725 invoked by alias); 8 Apr 2014 17:51:35 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28714 invoked by uid 89); 8 Apr 2014 17:51:35 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.9 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: mail-wi0-f173.google.com Received: from mail-wi0-f173.google.com (HELO mail-wi0-f173.google.com) (209.85.212.173) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES128-SHA encrypted) ESMTPS; Tue, 08 Apr 2014 17:51:34 +0000 Received: by mail-wi0-f173.google.com with SMTP id z2so7539855wiv.12 for ; Tue, 08 Apr 2014 10:51:31 -0700 (PDT) X-Received: by 10.194.84.144 with SMTP id z16mr5090306wjy.23.1396979490777; Tue, 08 Apr 2014 10:51:30 -0700 (PDT) Received: from localhost ([2.28.235.12]) by mx.google.com with ESMTPSA id hi1sm4314082wjb.17.2014.04.08.10.51.30 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 08 Apr 2014 10:51:30 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, rdsandiford@googlemail.com Subject: [committed] PR60763: POWER8 fallout from PR60604 Date: Tue, 08 Apr 2014 18:51:29 +0100 Message-ID: <87k3azvhem.fsf@talisman.default> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.3 (gnu/linux) MIME-Version: 1.0 The patch for PR60604 stopped nonimmediate_operand from accepting (subreg:M (reg:N R)) for combinations that are forbidden by REG_CANNOT_CHANGE_MODE_P, to match the existing register_operand behaviour. This stopped rs6000's movdi pattern from accepting such subregs as a destination (they were already not accepted as the source), which in turn meant the result of the reload_vsx_from_gprsf splitter didn't match. The last two patterns generated by reload_vsx_from_gprsf had the form: (set (subreg:DI (reg:SF FPR)) (reg:DI GPR)) (set (reg:SF FPR) (... (reg:SF FPR) ...)) The target of the first move is a (subreg:DI ...) rather than (reg:DI FPR) because the mode change is forbidden by CANNOT_CHANGE_MODE_CLASS. But in this case the sequence is really: (set (reg:DI FPR1) (reg:DI GPR)) (set (reg:SF FPR2) (... (reg:DI FPR1) ...)) where no mode change takes place as such. We just happen to be using the same FPR for FPR1 and FPR2. In those circumstances gen_rtx_REG seems more appropriate than simplify_gen_subreg. Tested by Pat and approved by David in the PR trail. Applied. Thanks, Richard gcc/ PR target/60763 * config/rs6000/vsx.md (vsx_xscvdpspn_scalar): Change input to DImode. * config/rs6000/rs6000.md (reload_vsx_from_gprsf): Update accordingly. Use gen_rtx_REG rather than simplify_gen_subreg for op0_di. Index: gcc/config/rs6000/vsx.md =================================================================== --- gcc/config/rs6000/vsx.md 2014-04-07 15:26:00.357746782 +0100 +++ gcc/config/rs6000/vsx.md 2014-04-07 15:26:00.552748458 +0100 @@ -1223,7 +1223,7 @@ (define_insn "vsx_xscvdpspn_scalar" ;; Used by direct move to move a SFmode value from GPR to VSX register (define_insn "vsx_xscvspdpn_directmove" [(set (match_operand:SF 0 "vsx_register_operand" "=wa") - (unspec:SF [(match_operand:SF 1 "vsx_register_operand" "wa")] + (unspec:SF [(match_operand:DI 1 "vsx_register_operand" "wa")] UNSPEC_VSX_CVSPDPN))] "TARGET_XSCVSPDPN" "xscvspdpn %x0,%x1" Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md 2014-04-07 15:26:00.356746773 +0100 +++ gcc/config/rs6000/rs6000.md 2014-04-08 18:14:31.668426223 +0100 @@ -10029,13 +10029,16 @@ (define_insn_and_split "reload_vsx_from_ rtx op0 = operands[0]; rtx op1 = operands[1]; rtx op2 = operands[2]; - rtx op0_di = simplify_gen_subreg (DImode, op0, SFmode, 0); + /* Also use the destination register to hold the unconverted DImode value. + This is conceptually a separate value from OP0, so we use gen_rtx_REG + rather than simplify_gen_subreg. */ + rtx op0_di = gen_rtx_REG (DImode, REGNO (op0)); rtx op1_di = simplify_gen_subreg (DImode, op1, SFmode, 0); /* Move SF value to upper 32-bits for xscvspdpn. */ emit_insn (gen_ashldi3 (op2, op1_di, GEN_INT (32))); emit_move_insn (op0_di, op2); - emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0)); + emit_insn (gen_vsx_xscvspdpn_directmove (op0, op0_di)); DONE; } [(set_attr "length" "8")