[SVE ACLE] Fix optab names for FMAXNM and FMINNM
FMAXNM and FMINNM should map to the fmax and fmin optabs, since they're
the ones that implement IEEE semantics. The names of the fake FMAX and
FMIN optabs doesn't matter, but we might as well use "_nan" for
consistency with the other AArch64 patterns.
Fixes aarch64/sve/maxmin_strict_1.c.
@@ -1800,7 +1800,7 @@
(const_int SVE_ALLOW_NEW_FAULTS)
(match_operand:SVE_F 1 "register_operand")
(match_operand:SVE_F 2 "register_operand")]
- SVE_COND_MAXMIN))]
+ SVE_COND_MAXMIN))]
"TARGET_SVE"
{
operands[3] = force_reg (<VPRED>mode, CONSTM1_RTX (<VPRED>mode));
@@ -1811,11 +1811,11 @@
(define_insn "@aarch64_pred_<maxmin_uns><mode>"
[(set (match_operand:SVE_F 0 "register_operand" "=w, ?&w")
(unspec:SVE_F
- [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
+ [(match_operand:<VPRED> 1 "register_operand" "Upl, Upl")
(match_operand:SI 4 "const_int_operand" "i, i")
(match_operand:SVE_F 2 "register_operand" "%0, w")
(match_operand:SVE_F 3 "register_operand" "w, w")]
- SVE_COND_MAXMIN))]
+ SVE_COND_MAXMIN))]
"TARGET_SVE"
"@
<maxmin_uns_op>\t%0.<Vetype>, %1/m, %0.<Vetype>, %3.<Vetype>
@@ -1631,10 +1631,10 @@
(UNSPEC_FMINV "smin_nan")
(UNSPEC_FMAXNM "fmax")
(UNSPEC_FMINNM "fmin")
- (UNSPEC_COND_FMAX "fmax")
- (UNSPEC_COND_FMIN "fmin")
- (UNSPEC_COND_FMAXNM "fmaxnm")
- (UNSPEC_COND_FMINNM "fminnm")])
+ (UNSPEC_COND_FMAX "fmax_nan")
+ (UNSPEC_COND_FMIN "fmin_nan")
+ (UNSPEC_COND_FMAXNM "fmax")
+ (UNSPEC_COND_FMINNM "fmin")])
(define_int_attr maxmin_uns_op [(UNSPEC_UMAXV "umax")
(UNSPEC_UMINV "umin")