diff mbox

[PR68432,22/22] Use preferred_for_size in i386 internal fn optabs

Message ID 87egfefe6g.fsf@e105548-lin.cambridge.arm.com
State New
Headers show

Commit Message

Richard Sandiford Nov. 25, 2015, 12:37 p.m. UTC
After all the set-up, this patch fixes the PR by converting
the internal-fn-related optimize_insn_for_size_p checks into
preferred_for_size attributes.

Tested as described in the covering note.

gcc/
	PR tree-optimization/68432
	* config/i386/i386.md (asinxf2): Replace optimize_insn_for_size_p
	check with a preferred_for_size attribute.
	(asin<mode>2, acosxf2, acos<mode>2, log1pxf2, log1p<mode>2)
	(expxf2, exp<mode>2, exp10xf2, exp10<mode>2, exp2xf2, exp2<mode>2)
	(expm1xf2, expm1<mode>2, ldexpxf3, ldexp<mode>3, scalbxf3)
	(scalb<mode>3, rint<mode>2, round<mode>2, <rounding_insn>xf2)
	(<rounding_insn><mode>2): Likewise.
	(expNcorexf3): Remove optimize_insn_for_size_p check.

gcc/testsuite/
	* gcc.target/i386/pr68432-1.c: New test.
	* gcc.target/i386/pr68432-2.c: Likewise.
	* gcc.target/i386/pr68432-3.c: Likewise.
diff mbox

Patch

diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index 87f60c0..be04a65 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -14725,14 +14725,12 @@ 
 {
   int i;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   for (i = 2; i < 6; i++)
     operands[i] = gen_reg_rtx (XFmode);
 
   emit_move_insn (operands[3], CONST1_RTX (XFmode));  /* fld1 */
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "asin<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -14745,14 +14743,12 @@ 
   rtx op0 = gen_reg_rtx (XFmode);
   rtx op1 = gen_reg_rtx (XFmode);
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
   emit_insn (gen_asinxf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "acosxf2"
   [(set (match_dup 2)
@@ -14769,14 +14765,12 @@ 
 {
   int i;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   for (i = 2; i < 6; i++)
     operands[i] = gen_reg_rtx (XFmode);
 
   emit_move_insn (operands[3], CONST1_RTX (XFmode));  /* fld1 */
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "acos<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -14789,14 +14783,12 @@ 
   rtx op0 = gen_reg_rtx (XFmode);
   rtx op1 = gen_reg_rtx (XFmode);
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
   emit_insn (gen_acosxf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_insn "fyl2xxf3_i387"
   [(set (match_operand:XF 0 "register_operand" "=f")
@@ -14952,12 +14944,10 @@ 
   "TARGET_USE_FANCY_MATH_387
    && flag_unsafe_math_optimizations"
 {
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   ix86_emit_i387_log1p (operands[0], operands[1]);
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "log1p<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -14969,9 +14959,6 @@ 
 {
   rtx op0;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
 
   operands[1] = gen_rtx_FLOAT_EXTEND (XFmode, operands[1]);
@@ -14979,7 +14966,8 @@ 
   ix86_emit_i387_log1p (op0, operands[1]);
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_insn "fxtractxf3_i387"
   [(set (match_operand:XF 0 "register_operand" "=f")
@@ -15065,9 +15053,6 @@ 
 {
   rtx op0, op1;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
 
@@ -15120,9 +15105,6 @@ 
 {
   int i;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   for (i = 3; i < 10; i++)
     operands[i] = gen_reg_rtx (XFmode);
 
@@ -15137,15 +15119,13 @@ 
 {
   rtx op2;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op2 = gen_reg_rtx (XFmode);
   emit_move_insn (op2, standard_80387_constant_rtx (5)); /* fldl2e */
 
   emit_insn (gen_expNcorexf3 (operands[0], operands[1], op2));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "exp<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15157,9 +15137,6 @@ 
 {
   rtx op0, op1;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
 
@@ -15167,7 +15144,8 @@ 
   emit_insn (gen_expxf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "exp10xf2"
   [(use (match_operand:XF 0 "register_operand"))
@@ -15177,15 +15155,13 @@ 
 {
   rtx op2;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op2 = gen_reg_rtx (XFmode);
   emit_move_insn (op2, standard_80387_constant_rtx (6)); /* fldl2t */
 
   emit_insn (gen_expNcorexf3 (operands[0], operands[1], op2));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "exp10<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15197,9 +15173,6 @@ 
 {
   rtx op0, op1;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
 
@@ -15207,7 +15180,8 @@ 
   emit_insn (gen_exp10xf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "exp2xf2"
   [(use (match_operand:XF 0 "register_operand"))
@@ -15217,15 +15191,13 @@ 
 {
   rtx op2;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op2 = gen_reg_rtx (XFmode);
   emit_move_insn (op2, CONST1_RTX (XFmode));  /* fld1 */
 
   emit_insn (gen_expNcorexf3 (operands[0], operands[1], op2));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "exp2<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15237,9 +15209,6 @@ 
 {
   rtx op0, op1;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
 
@@ -15247,7 +15216,8 @@ 
   emit_insn (gen_exp2xf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "expm1xf2"
   [(set (match_dup 3) (mult:XF (match_operand:XF 1 "register_operand")
@@ -15277,9 +15247,6 @@ 
 {
   int i;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   for (i = 2; i < 13; i++)
     operands[i] = gen_reg_rtx (XFmode);
 
@@ -15287,7 +15254,8 @@ 
     = validize_mem (force_const_mem (SFmode, CONST1_RTX (SFmode))); /* fld1 */
 
   emit_move_insn (operands[2], standard_80387_constant_rtx (5)); /* fldl2e */
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "expm1<mode>2"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15299,9 +15267,6 @@ 
 {
   rtx op0, op1;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
 
@@ -15309,7 +15274,8 @@ 
   emit_insn (gen_expm1xf2 (op0, op1));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "ldexpxf3"
   [(match_operand:XF 0 "register_operand")
@@ -15319,8 +15285,6 @@ 
    && flag_unsafe_math_optimizations"
 {
   rtx tmp1, tmp2;
-  if (optimize_insn_for_size_p ())
-    FAIL;
 
   tmp1 = gen_reg_rtx (XFmode);
   tmp2 = gen_reg_rtx (XFmode);
@@ -15329,7 +15293,8 @@ 
   emit_insn (gen_fscalexf4_i387 (operands[0], tmp2,
                                  operands[1], tmp1));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "ldexp<mode>3"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15352,7 +15317,8 @@ 
   emit_insn (gen_ldexpxf3 (op0, op1, operands[2]));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "scalbxf3"
   [(parallel [(set (match_operand:XF 0 " register_operand")
@@ -15365,11 +15331,9 @@ 
   "TARGET_USE_FANCY_MATH_387
    && flag_unsafe_math_optimizations"
 {
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   operands[3] = gen_reg_rtx (XFmode);
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "scalb<mode>3"
   [(use (match_operand:MODEF 0 "register_operand"))
@@ -15382,9 +15346,6 @@ 
 {
   rtx op0, op1, op2;
 
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   op0 = gen_reg_rtx (XFmode);
   op1 = gen_reg_rtx (XFmode);
   op2 = gen_reg_rtx (XFmode);
@@ -15394,7 +15355,8 @@ 
   emit_insn (gen_scalbxf3 (op0, op1, op2));
   emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "significandxf2"
   [(parallel [(set (match_operand:XF 0 "register_operand")
@@ -15462,8 +15424,6 @@ 
       if (TARGET_ROUND)
 	emit_insn (gen_sse4_1_round<mode>2
 		   (operands[0], operands[1], GEN_INT (ROUND_MXCSR)));
-      else if (optimize_insn_for_size_p ())
-        FAIL;
       else
 	ix86_expand_rint (operands[0], operands[1]);
     }
@@ -15478,7 +15438,12 @@ 
       emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
     }
   DONE;
-})
+}
+  [(set (attr "preferred_for_size")
+	(symbol_ref "!(SSE_FLOAT_MODE_P (<MODE>mode)
+		       && TARGET_SSE_MATH
+		       && !flag_trapping_math)
+		      || TARGET_ROUND"))])
 
 (define_expand "round<mode>2"
   [(match_operand:X87MODEF 0 "register_operand")
@@ -15490,9 +15455,6 @@ 
    || (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
        && !flag_trapping_math && !flag_rounding_math)"
 {
-  if (optimize_insn_for_size_p ())
-    FAIL;
-
   if (SSE_FLOAT_MODE_P (<MODE>mode) && TARGET_SSE_MATH
       && !flag_trapping_math && !flag_rounding_math)
     {
@@ -15512,7 +15474,8 @@ 
       ix86_emit_i387_round (operands[0], operands[1]);
     }
   DONE;
-})
+}
+  [(set_attr "preferred_for_size" "0")])
 
 (define_insn_and_split "*fistdi2_1"
   [(set (match_operand:DI 0 "nonimmediate_operand")
@@ -15746,8 +15709,9 @@ 
 			      FRNDINT_ROUNDING))
 	      (clobber (reg:CC FLAGS_REG))])]
   "TARGET_USE_FANCY_MATH_387
-   && flag_unsafe_math_optimizations
-   && !optimize_insn_for_size_p ()")
+   && flag_unsafe_math_optimizations"
+  ""
+  [(set_attr "preferred_for_size" "0")])
 
 (define_expand "<rounding_insn><mode>2"
   [(parallel [(set (match_operand:MODEF 0 "register_operand")
@@ -15767,8 +15731,6 @@ 
       if (TARGET_ROUND)
 	emit_insn (gen_sse4_1_round<mode>2
 		   (operands[0], operands[1], GEN_INT (ROUND_<ROUNDING>)));
-      else if (optimize_insn_for_size_p ())
-	FAIL;
       else if (TARGET_64BIT || (<MODE>mode != DFmode))
 	{
 	  if (ROUND_<ROUNDING> == ROUND_FLOOR)
@@ -15796,9 +15758,6 @@ 
     {
       rtx op0, op1;
 
-      if (optimize_insn_for_size_p ())
-	FAIL;
-
       op0 = gen_reg_rtx (XFmode);
       op1 = gen_reg_rtx (XFmode);
       emit_insn (gen_extend<mode>xf2 (op1, operands[1]));
@@ -15807,7 +15766,12 @@ 
       emit_insn (gen_truncxf<mode>2_i387_noop (operands[0], op0));
     }
   DONE;
-})
+}
+  [(set (attr "preferred_for_size")
+	(symbol_ref "SSE_FLOAT_MODE_P (<MODE>mode)
+		     && TARGET_SSE_MATH
+		     && TARGET_ROUND
+		     && !flag_trapping_math"))])
 
 ;; Rounding mode control word calculation could clobber FLAGS_REG.
 (define_insn_and_split "frndintxf2_mask_pm"
diff --git a/gcc/testsuite/gcc.target/i386/pr68432-1.c b/gcc/testsuite/gcc.target/i386/pr68432-1.c
new file mode 100644
index 0000000..8493652
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68432-1.c
@@ -0,0 +1,17 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-math-errno -fno-trapping-math -msse2 -mfpmath=sse" } */
+
+float
+f1 (float f)
+{
+  return __builtin_rintf (f);
+}
+
+double
+f2 (double f)
+{
+  return __builtin_rint (f);
+}
+
+/* { dg-final { scan-assembler-times "\tucomiss\t" 1 } } */
+/* { dg-final { scan-assembler-times "\tucomisd\t" 1 } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr68432-2.c b/gcc/testsuite/gcc.target/i386/pr68432-2.c
new file mode 100644
index 0000000..8a0c295
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68432-2.c
@@ -0,0 +1,17 @@ 
+/* { dg-do compile } */
+/* { dg-options "-Os -fno-math-errno -fno-trapping-math -msse2 -mfpmath=sse" } */
+
+float
+f1 (float f)
+{
+  return __builtin_rintf (f);
+}
+
+double
+f2 (double f)
+{
+  return __builtin_rint (f);
+}
+
+/* { dg-final { scan-assembler-not "\tucomiss\t" } } */
+/* { dg-final { scan-assembler-not "\tucomisd\t" } } */
diff --git a/gcc/testsuite/gcc.target/i386/pr68432-3.c b/gcc/testsuite/gcc.target/i386/pr68432-3.c
new file mode 100644
index 0000000..5f22972
--- /dev/null
+++ b/gcc/testsuite/gcc.target/i386/pr68432-3.c
@@ -0,0 +1,17 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O2 -fno-math-errno -fno-trapping-math -msse2 -mfpmath=sse" } */
+
+float __attribute__ ((cold))
+f1 (float f)
+{
+  return __builtin_rintf (f);
+}
+
+double __attribute__ ((cold))
+f2 (double f)
+{
+  return __builtin_rint (f);
+}
+
+/* { dg-final { scan-assembler-not "\tucomiss\t" } } */
+/* { dg-final { scan-assembler-not "\tucomisd\t" } } */