| Message ID | 6D39441BF12EF246A7ABCE6654B0235320F9FF82@LEMAIL01.le.imgtec.org |
|---|---|
| State | New |
| Headers | show |
Hi Catherine, > The new behaviour of the GCC driver passing floating point options like > -msoft-float to the assembler is essential for the new o32 ABI > extensions but is a change in behaviour. In particular GCC 5 used with > binutils 2.24 would require a user to fix any hand-crafted code that > made use of floating-point instructions when building for soft-float. > This patch limits the new behaviour to a combination of GCC and binutils > that both have the new ABI support. > > This patch along with parts of several previous patches need backporting > to GCC 4.9 (and GCC 4.8) to enable use of binutils 2.25 with those > compilers. The GCC 4.9 patch will be posted shortly. I'm not sure if you missed this patch last week or if you are unsure about it? Since this is about restoring previous behaviour of MIPS GCC when built alongside binutils <= 2.24 I believe this still fits with stage4 criteria. Thanks, Matthew > > Thanks, > Matthew > > gcc/ > * config/mips/mips.h (FP_ASM_SPEC): New define. > (ASM_SPEC): Remove floating-point options and use FP_ASM_SPEC > instead. > --- > gcc/config/mips/mips.h | 21 ++++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > > diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index > 37d4cb4..ed241fa 100644 > --- a/gcc/config/mips/mips.h > +++ b/gcc/config/mips/mips.h > @@ -1243,6 +1243,22 @@ struct mips_cpu_info { %{gcoff*:-mdebug} > %{!gcoff*:-no-mdebug}" > #endif > > +/* FP_ASM_SPEC represents the floating-point options that must be > passed > + to the assembler when FPXX support exists. Prior to that point the > + assembler could accept the options but were not required for > + correctness. We only add the options when absolutely necessary > + because passing -msoft-float to the assembler will cause it to > reject > + all hard-float instructions which may require some user code to be > + updated. */ > + > +#ifdef HAVE_AS_DOT_MODULE > +#define FP_ASM_SPEC "\ > +%{mhard-float} %{msoft-float} \ > +%{msingle-float} %{mdouble-float}" > +#else > +#define FP_ASM_SPEC > +#endif > + > /* SUBTARGET_ASM_SPEC is always passed to the assembler. It may be > overridden by subtargets. */ > > @@ -1277,9 +1293,8 @@ struct mips_cpu_info { %{modd-spreg} %{mno-odd- > spreg} \ %{mshared} %{mno-shared} \ %{msym32} %{mno-sym32} \ - > %{mtune=*} \ -%{mhard-float} %{msoft-float} \ -%{msingle-float} > %{mdouble-float} \ > +%{mtune=*}" \ > +FP_ASM_SPEC "\ > %(subtarget_asm_spec)" > > /* Extra switches sometimes passed to the linker. */ > -- > 2.2.1
> -----Original Message----- > From: Matthew Fortune [mailto:Matthew.Fortune@imgtec.com] > Sent: Monday, January 19, 2015 5:54 PM > To: Moore, Catherine > Cc: 'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org) > Subject: RE: [PATCH,MIPS] Only pass floating-point options to the assembler > then > > Hi Catherine, > > > The new behaviour of the GCC driver passing floating point options > > like -msoft-float to the assembler is essential for the new o32 ABI > > extensions but is a change in behaviour. In particular GCC 5 used with > > binutils 2.24 would require a user to fix any hand-crafted code that > > made use of floating-point instructions when building for soft-float. > > This patch limits the new behaviour to a combination of GCC and > > binutils that both have the new ABI support. > > > > This patch along with parts of several previous patches need > > backporting to GCC 4.9 (and GCC 4.8) to enable use of binutils 2.25 > > with those compilers. The GCC 4.9 patch will be posted shortly. > > I'm not sure if you missed this patch last week or if you are unsure about it? > Since this is about restoring previous behaviour of MIPS GCC when built > alongside binutils <= 2.24 I believe this still fits with stage4 criteria. > Hi Matthew, I didn't miss it, but I wanted to complete some testing with it. Those tests have now completed and this patch is OK. Sorry for the delay. Thanks, Catherine > > > > gcc/ > > * config/mips/mips.h (FP_ASM_SPEC): New define. > > (ASM_SPEC): Remove floating-point options and use FP_ASM_SPEC > > instead. > > --- > > gcc/config/mips/mips.h | 21 ++++++++++++++++++--- > > 1 file changed, 18 insertions(+), 3 deletions(-) > > > > diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index > > 37d4cb4..ed241fa 100644 > > --- a/gcc/config/mips/mips.h > > +++ b/gcc/config/mips/mips.h > > @@ -1243,6 +1243,22 @@ struct mips_cpu_info { %{gcoff*:-mdebug} > > %{!gcoff*:-no-mdebug}" > > #endif > > > > +/* FP_ASM_SPEC represents the floating-point options that must be > > passed > > + to the assembler when FPXX support exists. Prior to that point the > > + assembler could accept the options but were not required for > > + correctness. We only add the options when absolutely necessary > > + because passing -msoft-float to the assembler will cause it to > > reject > > + all hard-float instructions which may require some user code to be > > + updated. */ > > + > > +#ifdef HAVE_AS_DOT_MODULE > > +#define FP_ASM_SPEC "\ > > +%{mhard-float} %{msoft-float} \ > > +%{msingle-float} %{mdouble-float}" > > +#else > > +#define FP_ASM_SPEC > > +#endif > > + > > /* SUBTARGET_ASM_SPEC is always passed to the assembler. It may be > > overridden by subtargets. */ > > > > @@ -1277,9 +1293,8 @@ struct mips_cpu_info { %{modd-spreg} %{mno- > odd- > > spreg} \ %{mshared} %{mno-shared} \ %{msym32} %{mno-sym32} \ - > > %{mtune=*} \ -%{mhard-float} %{msoft-float} \ -%{msingle-float} > > %{mdouble-float} \ > > +%{mtune=*}" \ > > +FP_ASM_SPEC "\ > > %(subtarget_asm_spec)" > > > > /* Extra switches sometimes passed to the linker. */ > > -- > > 2.2.1
Moore, Catherine <Catherine_Moore@mentor.com> writes: > > -----Original Message----- > > From: Matthew Fortune [mailto:Matthew.Fortune@imgtec.com] > > Sent: Monday, January 19, 2015 5:54 PM > > To: Moore, Catherine > > Cc: 'gcc-patches@gcc.gnu.org' (gcc-patches@gcc.gnu.org) > > Subject: RE: [PATCH,MIPS] Only pass floating-point options to the > > assembler then > > > > Hi Catherine, > > > > > The new behaviour of the GCC driver passing floating point options > > > like -msoft-float to the assembler is essential for the new o32 ABI > > > extensions but is a change in behaviour. In particular GCC 5 used > > > with binutils 2.24 would require a user to fix any hand-crafted code > > > that made use of floating-point instructions when building for soft- > float. > > > This patch limits the new behaviour to a combination of GCC and > > > binutils that both have the new ABI support. > > > > > > This patch along with parts of several previous patches need > > > backporting to GCC 4.9 (and GCC 4.8) to enable use of binutils 2.25 > > > with those compilers. The GCC 4.9 patch will be posted shortly. > > > > I'm not sure if you missed this patch last week or if you are unsure > about it? > > Since this is about restoring previous behaviour of MIPS GCC when > > built alongside binutils <= 2.24 I believe this still fits with stage4 > criteria. > > > Hi Matthew, > I didn't miss it, but I wanted to complete some testing with it. Those > tests have now completed and this patch is OK. > Sorry for the delay. No problem, just getting it resolved early so I can focus on bug hunting and fixing. Thanks for doing some testing on it. I'm going to try writing up the main MIPS changes for the GCC 5 changes webpage. I'll send a list to you once I've been through the code changes. Thanks, Matthew > Thanks, > Catherine > > > > > > > gcc/ > > > * config/mips/mips.h (FP_ASM_SPEC): New define. > > > (ASM_SPEC): Remove floating-point options and use FP_ASM_SPEC > > > instead. > > > --- > > > gcc/config/mips/mips.h | 21 ++++++++++++++++++--- > > > 1 file changed, 18 insertions(+), 3 deletions(-) > > > > > > diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index > > > 37d4cb4..ed241fa 100644 > > > --- a/gcc/config/mips/mips.h > > > +++ b/gcc/config/mips/mips.h > > > @@ -1243,6 +1243,22 @@ struct mips_cpu_info { %{gcoff*:-mdebug} > > > %{!gcoff*:-no-mdebug}" > > > #endif > > > > > > +/* FP_ASM_SPEC represents the floating-point options that must be > > > passed > > > + to the assembler when FPXX support exists. Prior to that point > the > > > + assembler could accept the options but were not required for > > > + correctness. We only add the options when absolutely necessary > > > + because passing -msoft-float to the assembler will cause it to > > > reject > > > + all hard-float instructions which may require some user code to > be > > > + updated. */ > > > + > > > +#ifdef HAVE_AS_DOT_MODULE > > > +#define FP_ASM_SPEC "\ > > > +%{mhard-float} %{msoft-float} \ > > > +%{msingle-float} %{mdouble-float}" > > > +#else > > > +#define FP_ASM_SPEC > > > +#endif > > > + > > > /* SUBTARGET_ASM_SPEC is always passed to the assembler. It may be > > > overridden by subtargets. */ > > > > > > @@ -1277,9 +1293,8 @@ struct mips_cpu_info { %{modd-spreg} %{mno- > > odd- > > > spreg} \ %{mshared} %{mno-shared} \ %{msym32} %{mno-sym32} \ - > > > %{mtune=*} \ -%{mhard-float} %{msoft-float} \ -%{msingle-float} > > > %{mdouble-float} \ > > > +%{mtune=*}" \ > > > +FP_ASM_SPEC "\ > > > %(subtarget_asm_spec)" > > > > > > /* Extra switches sometimes passed to the linker. */ > > > -- > > > 2.2.1
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 37d4cb4..ed241fa 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1243,6 +1243,22 @@ struct mips_cpu_info { %{gcoff*:-mdebug} %{!gcoff*:-no-mdebug}" #endif +/* FP_ASM_SPEC represents the floating-point options that must be passed + to the assembler when FPXX support exists. Prior to that point the + assembler could accept the options but were not required for + correctness. We only add the options when absolutely necessary + because passing -msoft-float to the assembler will cause it to reject + all hard-float instructions which may require some user code to be + updated. */ + +#ifdef HAVE_AS_DOT_MODULE +#define FP_ASM_SPEC "\ +%{mhard-float} %{msoft-float} \ +%{msingle-float} %{mdouble-float}" +#else +#define FP_ASM_SPEC +#endif + /* SUBTARGET_ASM_SPEC is always passed to the assembler. It may be overridden by subtargets. */ @@ -1277,9 +1293,8 @@ struct mips_cpu_info { %{modd-spreg} %{mno-odd-spreg} \ %{mshared} %{mno-shared} \ %{msym32} %{mno-sym32} \ -%{mtune=*} \ -%{mhard-float} %{msoft-float} \ -%{msingle-float} %{mdouble-float} \ +%{mtune=*}" \ +FP_ASM_SPEC "\ %(subtarget_asm_spec)" /* Extra switches sometimes passed to the linker. */