diff mbox series

Fix existing fold-vec-extract-longlong.p8.c testcase

Message ID 5f291d23382282567c1e37ae53586a87a2d27b3b.camel@vnet.ibm.com
State New
Headers show
Series Fix existing fold-vec-extract-longlong.p8.c testcase | expand

Commit Message

will schmidt Feb. 13, 2020, 10:41 p.m. UTC
Hi,
 The code generated by this test changed shortly after
this test was committed, and we didn't get back to
updating the scan-assembler statements to match.
Until now.

Tested across assorted power* linux targets.

OK for master?

Thanks
-Will
    
[testsuite]
    * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct expected insns.

Comments

Segher Boessenkool Feb. 13, 2020, 11:07 p.m. UTC | #1
Hi!

On Thu, Feb 13, 2020 at 04:41:03PM -0600, will schmidt wrote:
>  The code generated by this test changed shortly after
> this test was committed, and we didn't get back to
> updating the scan-assembler statements to match.
> Until now.

Progress!  :-)

Just some nits:

> [testsuite]
>     * gcc.target/powerpc/fold-vec-extract-longlong.p8.c: Correct expected insns.

That line is too long.

> +// P8 (LE) variables: addi,xxpermdi,mr,stxvd2x|sxxvd4x,rldicl,sldi,ldx,blr

s/sxx/stx/

> -/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */
> -/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */
> +/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 { target lp64 } } } */

Why drop the mtvsrd check?

> -/* { dg-final { scan-assembler-times {\mxxpermdi\M} 6 { target { be && lp64 } } } } */

Just like this one.  Do they match 0 times now?  Please keep the entry
then, but for 0 times?

Okay for trunk with that taken care of whichever way.  Thanks!


Segher
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
index e8aabd0..f8f399b 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-extract-longlong.p8.c
@@ -3,29 +3,25 @@ 
 
 /* { dg-do compile { target { powerpc*-*-linux* } } } */
 /* { dg-require-effective-target powerpc_p8vector_ok } */
 /* { dg-options "-mdejagnu-cpu=power8 -O2" } */
 
-// targeting P8, both LE and BE. six tests.
+// Targeting P8LE and P8BE, six tests total.
 // P8 (LE) constants: mfvsrd
-// P8 (LE) variables: xori, rldic, mtvsrd, xxpermdi, vslo, mfvsrd
-// P8 (BE) constants: xxpermdi, mfvsrd
-// P8 (BE) Variables:       rldic, mtvsrd, xxpermdi, vslo, mfvsrd
+// P8 (LE) variables: addi,xxpermdi,mr,stxvd2x|sxxvd4x,rldicl,sldi,ldx,blr
+// P8 (BE) constants: mfvsrd
+// P8 (BE) Variables: addi,xxpermdi,rldicl,mr,stxvd2x|stxvd4x,sldi,ldx,blr
 
-/* results. */
-/* { dg-final { scan-assembler-times {\mxori\M} 3 { target le } } } */
-/* { dg-final { scan-assembler-times {\mrldic\M|\mrlwinm\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mrldicl\M|\mrldic\M|\mrlwinm\M} 3 } } */
+/* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 3 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mstxvd2x\M|\mstxvw4x\M} 4 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\madd\M} 3 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\mlwz\M} 11 { target ilp32 } } } */
 /* { dg-final { scan-assembler-times {\maddi\M} 6 { target ilp32 } } } */
-/* { dg-final { scan-assembler-times {\mmfvsrd\M} 6 { target lp64 } } } */
-/* { dg-final { scan-assembler-times {\mmtvsrd\M} 3 { target lp64 } } } */
+/* { dg-final { scan-assembler-times {\mmfvsrd\M} 3 { target lp64 } } } */
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 3 { target le } } } */
-/* { dg-final { scan-assembler-times {\mxxpermdi\M} 6 { target { be && lp64 } } } } */
 /* { dg-final { scan-assembler-times {\mxxpermdi\M} 2 { target { be && ilp32 } } } } */
-/* { dg-final { scan-assembler-times {\mvslo\M} 3 { target lp64 } } } */
 
 #include <altivec.h>
 
 unsigned long long
 testbl_var (vector bool long long vbl2, signed int si)