| Message ID | 58BFDE2B.8030601@foss.arm.com |
|---|---|
| State | New |
| Headers | show |
On 08/03/17 10:34, Kyrill Tkachov wrote: > Hi all, > > This patch fixes the NEON patterns with Jakub's genrecog verification > improvements: > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select HImode and its operand QImode > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select SImode and its operand QImode > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select QImode and its operand HImode > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select SImode and its operand HImode > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select QImode and its operand SImode > ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between > vec_select HImode and its operand SImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select HImode and its operand QImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select SImode and its operand QImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select QImode and its operand HImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select SImode and its operand HImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select QImode and its operand SImode > ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between > vec_select HImode and its operand SImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select HImode and its operand QImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select SImode and its operand QImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select QImode and its operand HImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select SImode and its operand HImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select QImode and its operand SImode > ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between > vec_select HImode and its operand SImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select HImode and its operand QImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select SImode and its operand QImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select QImode and its operand HImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select SImode and its operand HImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select QImode and its operand SImode > ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between > vec_select HImode and its operand SImode > > The problem is that the affected patterns use both the VQI iterator > [V16QI V8HI V4SI] and the > VW iterator [V8QI V4HI V2SI]. The intent was to use V8QI when VQI > returned V16QI, V4HI when VQI returned V8HI etc. > But using both iterators at the same time creates a cartesian product of > combinations, so the iterators expanded > to some patterns that are not valid that is, the inner mode of the > vec_select mode being not the same as the > inner mode of its vector argument. > > This patch fixes that by using the appropriate V_HALF mode attribute > instead of the VW iterator, so VQI is the only > real mode iterator used in these patterns. I took care to leave the > expanded name of each pattern the same so that > their gen_* invocations from widen_ssum<mode>3 and widen_usum<mode>3 > remain the same. > > With this patch the arm backend passes the genrecog validations. > > Bootstrapped and tested on arm-none-linux-gnueabihf. > > Ok for trunk? > > Thanks, > Kyrill > > > 2017-03-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > PR target/79911 > * config/arm/neon.md (vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3): > Rename to... > (vec_sel_widen_ssum_lo<mode><V_half>3): ... This. Avoid mismatch > between vec_select and vector argument. > (vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3): Rename to... > (vec_sel_widen_ssum_hi<mode><V_half>3): ... This. Likewise. > (vec_sel_widen_usum_lo<VQI:mode><VW:mode>3): Rename to... > (vec_sel_widen_usum_lo<mode><V_half>3): ... This. > (vec_sel_widen_usum_hi<VQI:mode><VW:mode>3): Rename to... > (vec_sel_widen_usum_hi<mode><V_half>3): ... This. > OK. R. > arm-vec-select.patch > > > diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md > index cf281df..50d89eb 100644 > --- a/gcc/config/arm/neon.md > +++ b/gcc/config/arm/neon.md > @@ -1335,14 +1335,14 @@ (define_expand "widen_ssum<mode>3" > } > ) > > -(define_insn "vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3" > - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") > - (plus:<VW:V_widen> > - (sign_extend:<VW:V_widen> > - (vec_select:VW > +(define_insn "vec_sel_widen_ssum_lo<mode><V_half>3" > + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") > + (plus:<V_double_width> > + (sign_extend:<V_double_width> > + (vec_select:<V_HALF> > (match_operand:VQI 1 "s_register_operand" "%w") > (match_operand:VQI 2 "vect_par_constant_low" ""))) > - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] > + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] > "TARGET_NEON" > { > return BYTES_BIG_ENDIAN ? "vaddw.<V_s_elem>\t%q0, %q3, %f1" : > @@ -1350,13 +1350,14 @@ (define_insn "vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3" > } > [(set_attr "type" "neon_add_widen")]) > > -(define_insn "vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3" > - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") > - (plus:<VW:V_widen> > - (sign_extend:<VW:V_widen> > - (vec_select:VW (match_operand:VQI 1 "s_register_operand" "%w") > +(define_insn "vec_sel_widen_ssum_hi<mode><V_half>3" > + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") > + (plus:<V_double_width> > + (sign_extend:<V_double_width> > + (vec_select:<V_HALF> > + (match_operand:VQI 1 "s_register_operand" "%w") > (match_operand:VQI 2 "vect_par_constant_high" ""))) > - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] > + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] > "TARGET_NEON" > { > return BYTES_BIG_ENDIAN ? "vaddw.<V_s_elem>\t%q0, %q3, %e1" : > @@ -1404,14 +1405,14 @@ (define_expand "widen_usum<mode>3" > } > ) > > -(define_insn "vec_sel_widen_usum_lo<VQI:mode><VW:mode>3" > - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") > - (plus:<VW:V_widen> > - (zero_extend:<VW:V_widen> > - (vec_select:VW > +(define_insn "vec_sel_widen_usum_lo<mode><V_half>3" > + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") > + (plus:<V_double_width> > + (zero_extend:<V_double_width> > + (vec_select:<V_HALF> > (match_operand:VQI 1 "s_register_operand" "%w") > (match_operand:VQI 2 "vect_par_constant_low" ""))) > - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] > + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] > "TARGET_NEON" > { > return BYTES_BIG_ENDIAN ? "vaddw.<V_u_elem>\t%q0, %q3, %f1" : > @@ -1419,13 +1420,14 @@ (define_insn "vec_sel_widen_usum_lo<VQI:mode><VW:mode>3" > } > [(set_attr "type" "neon_add_widen")]) > > -(define_insn "vec_sel_widen_usum_hi<VQI:mode><VW:mode>3" > - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") > - (plus:<VW:V_widen> > - (zero_extend:<VW:V_widen> > - (vec_select:VW (match_operand:VQI 1 "s_register_operand" "%w") > +(define_insn "vec_sel_widen_usum_hi<mode><V_half>3" > + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") > + (plus:<V_double_width> > + (zero_extend:<V_double_width> > + (vec_select:<V_HALF> > + (match_operand:VQI 1 "s_register_operand" "%w") > (match_operand:VQI 2 "vect_par_constant_high" ""))) > - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] > + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] > "TARGET_NEON" > { > return BYTES_BIG_ENDIAN ? "vaddw.<V_u_elem>\t%q0, %q3, %e1" : >
diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index cf281df..50d89eb 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -1335,14 +1335,14 @@ (define_expand "widen_ssum<mode>3" } ) -(define_insn "vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3" - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") - (plus:<VW:V_widen> - (sign_extend:<VW:V_widen> - (vec_select:VW +(define_insn "vec_sel_widen_ssum_lo<mode><V_half>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") + (plus:<V_double_width> + (sign_extend:<V_double_width> + (vec_select:<V_HALF> (match_operand:VQI 1 "s_register_operand" "%w") (match_operand:VQI 2 "vect_par_constant_low" ""))) - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] "TARGET_NEON" { return BYTES_BIG_ENDIAN ? "vaddw.<V_s_elem>\t%q0, %q3, %f1" : @@ -1350,13 +1350,14 @@ (define_insn "vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3" } [(set_attr "type" "neon_add_widen")]) -(define_insn "vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3" - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") - (plus:<VW:V_widen> - (sign_extend:<VW:V_widen> - (vec_select:VW (match_operand:VQI 1 "s_register_operand" "%w") +(define_insn "vec_sel_widen_ssum_hi<mode><V_half>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") + (plus:<V_double_width> + (sign_extend:<V_double_width> + (vec_select:<V_HALF> + (match_operand:VQI 1 "s_register_operand" "%w") (match_operand:VQI 2 "vect_par_constant_high" ""))) - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] "TARGET_NEON" { return BYTES_BIG_ENDIAN ? "vaddw.<V_s_elem>\t%q0, %q3, %e1" : @@ -1404,14 +1405,14 @@ (define_expand "widen_usum<mode>3" } ) -(define_insn "vec_sel_widen_usum_lo<VQI:mode><VW:mode>3" - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") - (plus:<VW:V_widen> - (zero_extend:<VW:V_widen> - (vec_select:VW +(define_insn "vec_sel_widen_usum_lo<mode><V_half>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") + (plus:<V_double_width> + (zero_extend:<V_double_width> + (vec_select:<V_HALF> (match_operand:VQI 1 "s_register_operand" "%w") (match_operand:VQI 2 "vect_par_constant_low" ""))) - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] "TARGET_NEON" { return BYTES_BIG_ENDIAN ? "vaddw.<V_u_elem>\t%q0, %q3, %f1" : @@ -1419,13 +1420,14 @@ (define_insn "vec_sel_widen_usum_lo<VQI:mode><VW:mode>3" } [(set_attr "type" "neon_add_widen")]) -(define_insn "vec_sel_widen_usum_hi<VQI:mode><VW:mode>3" - [(set (match_operand:<VW:V_widen> 0 "s_register_operand" "=w") - (plus:<VW:V_widen> - (zero_extend:<VW:V_widen> - (vec_select:VW (match_operand:VQI 1 "s_register_operand" "%w") +(define_insn "vec_sel_widen_usum_hi<mode><V_half>3" + [(set (match_operand:<V_double_width> 0 "s_register_operand" "=w") + (plus:<V_double_width> + (zero_extend:<V_double_width> + (vec_select:<V_HALF> + (match_operand:VQI 1 "s_register_operand" "%w") (match_operand:VQI 2 "vect_par_constant_high" ""))) - (match_operand:<VW:V_widen> 3 "s_register_operand" "0")))] + (match_operand:<V_double_width> 3 "s_register_operand" "0")))] "TARGET_NEON" { return BYTES_BIG_ENDIAN ? "vaddw.<V_u_elem>\t%q0, %q3, %e1" :
Hi all, This patch fixes the NEON patterns with Jakub's genrecog verification improvements: ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select HImode and its operand QImode ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select SImode and its operand QImode ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select QImode and its operand HImode ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select SImode and its operand HImode ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select QImode and its operand SImode ../../gcc/config/arm/neon.md:1338:1: element mode mismatch between vec_select HImode and its operand SImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select HImode and its operand QImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select SImode and its operand QImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select QImode and its operand HImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select SImode and its operand HImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select QImode and its operand SImode ../../gcc/config/arm/neon.md:1353:1: element mode mismatch between vec_select HImode and its operand SImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select HImode and its operand QImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select SImode and its operand QImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select QImode and its operand HImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select SImode and its operand HImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select QImode and its operand SImode ../../gcc/config/arm/neon.md:1407:1: element mode mismatch between vec_select HImode and its operand SImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select HImode and its operand QImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select SImode and its operand QImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select QImode and its operand HImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select SImode and its operand HImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select QImode and its operand SImode ../../gcc/config/arm/neon.md:1422:1: element mode mismatch between vec_select HImode and its operand SImode The problem is that the affected patterns use both the VQI iterator [V16QI V8HI V4SI] and the VW iterator [V8QI V4HI V2SI]. The intent was to use V8QI when VQI returned V16QI, V4HI when VQI returned V8HI etc. But using both iterators at the same time creates a cartesian product of combinations, so the iterators expanded to some patterns that are not valid that is, the inner mode of the vec_select mode being not the same as the inner mode of its vector argument. This patch fixes that by using the appropriate V_HALF mode attribute instead of the VW iterator, so VQI is the only real mode iterator used in these patterns. I took care to leave the expanded name of each pattern the same so that their gen_* invocations from widen_ssum<mode>3 and widen_usum<mode>3 remain the same. With this patch the arm backend passes the genrecog validations. Bootstrapped and tested on arm-none-linux-gnueabihf. Ok for trunk? Thanks, Kyrill 2017-03-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com> PR target/79911 * config/arm/neon.md (vec_sel_widen_ssum_lo<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_ssum_lo<mode><V_half>3): ... This. Avoid mismatch between vec_select and vector argument. (vec_sel_widen_ssum_hi<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_ssum_hi<mode><V_half>3): ... This. Likewise. (vec_sel_widen_usum_lo<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_usum_lo<mode><V_half>3): ... This. (vec_sel_widen_usum_hi<VQI:mode><VW:mode>3): Rename to... (vec_sel_widen_usum_hi<mode><V_half>3): ... This.