diff mbox

[AArch64] Fix PR78382

Message ID 582EC512.5050800@foss.arm.com
State New
Headers show

Commit Message

Kyrill Tkachov Nov. 18, 2016, 9:08 a.m. UTC 
Hi Naveen,

On 18/11/16 05:30, Hurugalawadi, Naveen wrote:
> Hi,
>
> Please find attached the patch that fixes PR78382.
>
> The "SYMBOL_SMALL_TLSGD" was not handled for ILP32.
> Hence it generates error when compiled for ILP32.
> The attached patch adds the support and handles it properly as expected
> for ILP32.
>
> Please review the patch and let me know if its okay?
>
> Regression tested on AArch64 with no regressions.

Bootstrap on an aarch64 system is also required.

> Thanks,
> Naveen
>
> 2016-11-18  Naveen H.S  <Naveen.Hurugalawadi@caviumnetworks.com>
>
> 	* config/aarch64/aarch64.c (aarch64_load_symref_appropriately):
> 	Handle SYMBOL_SMALL_TLSGD for ILP32.
> 	* config/aarch64/aarch64.md : tlsgd_small modified into
> 	tlsgd_small_<mode> to support SImode and DImode.
> 	*tlsgd_small modified into *tlsgd_small_<mode> to support SImode and
> 	DImode.
>

Comments

Hurugalawadi, Naveen Nov. 18, 2016, 10:19 a.m. UTC | #1 
Hi Kyrill,

Thanks for the comment.

Bootstrapped successfully on AArch64 (thunder) system.
And also regression tested on AArch64(thunder) with no regressions.

Thanks,
Naveen
diff mbox

Patch

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index 11d41cf..1688f0d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -1374,10 +1374,17 @@  aarch64_load_symref_appropriately (rtx dest, rtx imm,
      case SYMBOL_SMALL_TLSGD:
        {
  	rtx_insn *insns;
-	rtx result = gen_rtx_REG (Pmode, R0_REGNUM);
+	rtx result;
+	if (TARGET_ILP32)
+	  result = gen_rtx_REG (SImode, R0_REGNUM);
+	else
+	  result = gen_rtx_REG (DImode, R0_REGNUM);
  
Just use gen_rtx_REG (ptr_mode, R0_REGNUM)?

  	start_sequence ();
-	aarch64_emit_call_insn (gen_tlsgd_small (result, imm));
+	if (TARGET_ILP32)
+	  aarch64_emit_call_insn (gen_tlsgd_small_si (result, imm));
+	else
+	  aarch64_emit_call_insn (gen_tlsgd_small_di (result, imm));
  	insns = get_insns ();
  	end_sequence ();
  
diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md
index a652a7c..4833c7f 100644
--- a/gcc/config/aarch64/aarch64.md
+++ b/gcc/config/aarch64/aarch64.md
@@ -5089,20 +5089,20 @@ 
  ;; The TLS ABI specifically requires that the compiler does not schedule
  ;; instructions in the TLS stubs, in order to enable linker relaxation.
  ;; Therefore we treat the stubs as an atomic sequence.
-(define_expand "tlsgd_small"
+(define_expand "tlsgd_small_<mode>"
   [(parallel [(set (match_operand 0 "register_operand" "")
                    (call (mem:DI (match_dup 2)) (const_int 1)))
-	     (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
+	     (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "")] UNSPEC_GOTSMALLTLS)
  	     (clobber (reg:DI LR_REGNUM))])]
   ""
  {
    operands[2] = aarch64_tls_get_addr ();
  })
  
-(define_insn "*tlsgd_small"
+(define_insn "*tlsgd_small_<mode>"
    [(set (match_operand 0 "register_operand" "")
  	(call (mem:DI (match_operand:DI 2 "" "")) (const_int 1)))
-   (unspec:DI [(match_operand:DI 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
+   (unspec:DI [(match_operand:PTR 1 "aarch64_valid_symref" "S")] UNSPEC_GOTSMALLTLS)
     (clobber (reg:DI LR_REGNUM))
    ]
    ""
diff --git a/gcc/testsuite/gcc.target/aarch64/pr78382.c b/gcc/testsuite/gcc.target/aarch64/pr78382.c
new file mode 100644
index 0000000..6c98e5e
--- /dev/null
+++ b/gcc/testsuite/gcc.target/aarch64/pr78382.c
@@ -0,0 +1,10 @@ 
+/* { dg-do compile } */
+/* { dg-options "-O0 -fpic -mabi=ilp32 -mtls-dialect=trad" } */
+
+__thread int abc;
+void
+foo ()
+{
+  int *p;
+  p = &abc;
+}