Message ID | 57441660.1040905@foss.arm.com |
---|---|
State | New |
Headers | show |
On 24/05/16 09:52, Kyrill Tkachov wrote: > Hi all, > > As the PR says, the gen_operands_ldrd_strd function has a spurious return false in it. > It seems to have been there from the beginning when that code was added. > > The code is trying to transform: > mov r0, 0 > str r0, [r2] > mov r0, 1 > str r0, [r2, #4] > into: > mov r0, 0 > mov r1, 1 > strd r0, r1, [r2] > > but thanks to this return only works on Thumb2. > This means that the path it was not getting tested, and we weren't generating > as many STRD instructions as we could when compiling with -marm. > This patch removes the spurious return. It also re-indents the comment for this > transformation (replacing 8 spaces with tab) and adds a mention of the behaviour > for ARM state that was missing. > > With it bootstrap and test in arm state on arm-none-linux-gnueabihf runs fine. > > Across all of SPEC2006 this increased the number of STRD instructions used by 0.12% > (from 121375 -> 121530) > > Ok for trunk? Ok - oops ! Ramana > > Thanks, > Kyrill > > 2016-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com> > > PR target/69857 > * config/arm/arm.c (gen_operands_ldrd_strd): Remove bogus early > return. Reindent transformation comment and mention the ARM state > behavior.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 089d1483ac534cfd7693fdd309149aa5e8bf8191..fe1c37cda62fa76ef9438208e39b3a91e7161972 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -15985,14 +15985,17 @@ gen_operands_ldrd_strd (rtx *operands, bool load, /* If the same input register is used in both stores when storing different constants, try to find a free register. For example, the code - mov r0, 0 - str r0, [r2] - mov r0, 1 - str r0, [r2, #4] + mov r0, 0 + str r0, [r2] + mov r0, 1 + str r0, [r2, #4] can be transformed into - mov r1, 0 - strd r1, r0, [r2] - in Thumb mode assuming that r1 is free. */ + mov r1, 0 + mov r0, 1 + strd r1, r0, [r2] + in Thumb mode assuming that r1 is free. + For ARM mode do the same but only if the starting register + can be made to be even. */ if (const_store && REGNO (operands[0]) == REGNO (operands[1]) && INTVAL (operands[4]) != INTVAL (operands[5])) @@ -16011,7 +16014,6 @@ gen_operands_ldrd_strd (rtx *operands, bool load, } else if (TARGET_ARM) { - return false; int regno = REGNO (operands[0]); if (!peep2_reg_dead_p (4, operands[0])) {