diff mbox

i386: relax scan-assembler test in lzcnt-1 testcase

Message ID 56C78AF7.2060907@redhat.com
State New
Headers show

Commit Message

Bernd Schmidt Feb. 19, 2016, 9:36 p.m. UTC 
I'm working on some IRA cost fixes, and I've had the lzcnt-1.c test fail 
because the register allocator started making different decisions. In 
both cases we end up generating two instructions, but with slightly 
different register assignments. Hence, this patch, which relaxes the 
test slightly.

Bootstrapped and tested on x86_64-linux (with my IRA changes, so I 
probably ought to try without those as well). Ok?


Bernd

Comments

Jeff Law Feb. 19, 2016, 9:37 p.m. UTC | #1 
On 02/19/2016 02:36 PM, Bernd Schmidt wrote:
> I'm working on some IRA cost fixes, and I've had the lzcnt-1.c test fail
> because the register allocator started making different decisions. In
> both cases we end up generating two instructions, but with slightly
> different register assignments. Hence, this patch, which relaxes the
> test slightly.
>
> Bootstrapped and tested on x86_64-linux (with my IRA changes, so I
> probably ought to try without those as well). Ok?
OK.
jeff
diff mbox

Patch

	* gcc.target/i386/lzcnt-1.c: Allow a different lzcntw output register.

Index: gcc/testsuite/gcc.target/i386/lzcnt-1.c
===================================================================
--- gcc/testsuite/gcc.target/i386/lzcnt-1.c	(revision 233451)
+++ gcc/testsuite/gcc.target/i386/lzcnt-1.c	(working copy)
@@ -1,6 +1,6 @@ 
 /* { dg-do compile } */
 /* { dg-options "-O2 -mlzcnt " } */
-/* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)ax" } } */
+/* { dg-final { scan-assembler "lzcntw\[^\\n]*(%|)\[ad\]\[xi\]" } } */
 
 #include <x86intrin.h>