@@ -87,6 +87,12 @@ arm_bswap_qualifiers[SIMD_MAX_BUILTIN_ARGS]
= { qualifier_unsigned, qualifier_unsigned };
#define BSWAP_QUALIFIERS (arm_bswap_qualifiers)
+/* unsigned T (T). */
+static enum arm_type_qualifiers
+arm_unopus_qualifiers[SIMD_MAX_BUILTIN_ARGS]
+ = { qualifier_unsigned, qualifier_none };
+#define UNOPUS_QUALIFIERS (arm_unopus_qualifiers)
+
/* T (T, T [maybe_immediate]). */
static enum arm_type_qualifiers
arm_binop_qualifiers[SIMD_MAX_BUILTIN_ARGS]
@@ -6356,6 +6356,106 @@ vcvtq_u32_f32 (float32x4_t __a)
}
#pragma GCC push_options
+#pragma GCC target ("fpu=neon-fp-armv8")
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvta_s32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtasv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvta_u32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtauv2sf_us (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtaq_s32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtasv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtaq_u32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtauv4sf_us (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvtm_s32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtmsv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvtm_u32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtmuv2sf_us (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtmq_s32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtmsv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtmq_u32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtmuv4sf_us (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvtn_s32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtnsv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvtn_u32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtnuv2sf_us (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtnq_s32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtnsv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtnq_u32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtnuv4sf_us (__a);
+}
+
+__extension__ static __inline int32x2_t __attribute__ ((__always_inline__))
+vcvtp_s32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtpsv2sf (__a);
+}
+
+__extension__ static __inline uint32x2_t __attribute__ ((__always_inline__))
+vcvtp_u32_f32 (float32x2_t __a)
+{
+ return __builtin_neon_vcvtpuv2sf_us (__a);
+}
+
+__extension__ static __inline int32x4_t __attribute__ ((__always_inline__))
+vcvtpq_s32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtpsv4sf (__a);
+}
+
+__extension__ static __inline uint32x4_t __attribute__ ((__always_inline__))
+vcvtpq_u32_f32 (float32x4_t __a)
+{
+ return __builtin_neon_vcvtpuv4sf_us (__a);
+}
+
+#pragma GCC pop_options
+
+#pragma GCC push_options
#pragma GCC target ("fpu=neon-fp16")
#if defined (__ARM_FP16_FORMAT_IEEE) || defined (__ARM_FP16_FORMAT_ALTERNATIVE)
__extension__ static __inline float16x4_t __attribute__ ((__always_inline__))
@@ -223,6 +223,14 @@ VAR1 (UNOP, vcvtmv2sf, v2si)
VAR1 (UNOP, vcvtmv4sf, v4si)
VAR1 (UNOP, vcvtmuv2sf, v2si)
VAR1 (UNOP, vcvtmuv4sf, v4si)
+VAR2 (UNOP, vcvtas, v2sf, v4sf)
+VAR2 (UNOPUS, vcvtau, v2sf, v4sf)
+VAR2 (UNOP, vcvtps, v2sf, v4sf)
+VAR2 (UNOPUS, vcvtpu, v2sf, v4sf)
+VAR2 (UNOP, vcvtms, v2sf, v4sf)
+VAR2 (UNOPUS, vcvtmu, v2sf, v4sf)
+VAR2 (UNOP, vcvtns, v2sf, v4sf)
+VAR2 (UNOPUS, vcvtnu, v2sf, v4sf)
VAR1 (COMBINE, vtbl1, v8qi)
VAR1 (COMBINE, vtbl2, v8qi)
VAR1 (COMBINE, vtbl3, v8qi)
@@ -319,6 +319,16 @@
(define_int_iterator VCVT_US [UNSPEC_VCVT_S UNSPEC_VCVT_U])
+(define_int_iterator VCVTR_US [UNSPEC_VCVT_S UNSPEC_VCVT_U
+ (UNSPEC_VCVTA_S "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTA_U "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTM_S "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTM_U "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTN_S "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTN_U "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTP_S "TARGET_FPU_ARMV8")
+ (UNSPEC_VCVTP_U "TARGET_FPU_ARMV8")])
+
(define_int_iterator VCVT_US_N [UNSPEC_VCVT_S_N UNSPEC_VCVT_U_N])
(define_int_iterator VQMOVN [UNSPEC_VQMOVN_S UNSPEC_VQMOVN_U])
@@ -704,6 +714,10 @@
(UNSPEC_VPMAX "s") (UNSPEC_VPMAX_U "u")
(UNSPEC_VPMIN "s") (UNSPEC_VPMIN_U "u")
(UNSPEC_VCVT_S "s") (UNSPEC_VCVT_U "u")
+ (UNSPEC_VCVTA_S "s") (UNSPEC_VCVTA_U "u")
+ (UNSPEC_VCVTM_S "s") (UNSPEC_VCVTM_U "u")
+ (UNSPEC_VCVTN_S "s") (UNSPEC_VCVTN_U "u")
+ (UNSPEC_VCVTP_S "s") (UNSPEC_VCVTP_U "u")
(UNSPEC_VCVT_S_N "s") (UNSPEC_VCVT_U_N "u")
(UNSPEC_VQMOVN_S "s") (UNSPEC_VQMOVN_U "u")
(UNSPEC_VMOVL_S "s") (UNSPEC_VMOVL_U "u")
@@ -722,6 +736,14 @@
])
+(define_int_attr rndmode [
+ (UNSPEC_VCVT_S "") (UNSPEC_VCVT_U "")
+ (UNSPEC_VCVTA_S "a") (UNSPEC_VCVTA_U "a")
+ (UNSPEC_VCVTM_S "m") (UNSPEC_VCVTM_U "m")
+ (UNSPEC_VCVTN_S "n") (UNSPEC_VCVTN_U "n")
+ (UNSPEC_VCVTP_S "p") (UNSPEC_VCVTP_U "p")
+])
+
(define_int_attr cmp_op_unsp [(UNSPEC_VCEQ "eq") (UNSPEC_VCGT "gt")
(UNSPEC_VCGE "ge") (UNSPEC_VCLE "le")
(UNSPEC_VCLT "lt") (UNSPEC_VCAGE "ge")
@@ -2988,13 +2988,17 @@ if (BYTES_BIG_ENDIAN)
[(set_attr "type" "neon_fp_to_int_<V_elem_ch><q>")]
)
-(define_insn "neon_vcvt<sup><mode>"
+;; For the ARMv8 versions of vcvt i.e. vcvt(a|m|n|p) to be available, not
+;; only TARGET_NEON needs to be true, but also TARGET_FPU_ARMV8 needs to
+;; be true, because the VCVTR_US int_iterator defines TARGET_FPU_ARMV8
+;; as a condition.
+(define_insn "neon_vcvt<VCVTR_US:rndmode><VCVTR_US:sup><VCVTF:mode>"
[(set (match_operand:<V_CVTTO> 0 "s_register_operand" "=w")
(unspec:<V_CVTTO> [(match_operand:VCVTF 1 "s_register_operand" "w")]
- VCVT_US))]
+ VCVTR_US))]
"TARGET_NEON"
- "vcvt.<sup>%#32.f32\t%<V_reg>0, %<V_reg>1"
- [(set_attr "type" "neon_fp_to_int_<V_elem_ch><q>")]
+ "vcvt<rndmode>.<sup>%#32.f32\t%<VCVTF:V_reg>0, %<VCVTF:V_reg>1"
+ [(set_attr "type" "neon_fp_to_int_<VCVTF:V_elem_ch><q>")]
)
(define_insn "neon_vcvt<sup><mode>"
@@ -200,6 +200,14 @@
UNSPEC_VCVT
UNSPEC_VCVT_S
UNSPEC_VCVT_U
+ UNSPEC_VCVTA_S
+ UNSPEC_VCVTA_U
+ UNSPEC_VCVTM_S
+ UNSPEC_VCVTM_U
+ UNSPEC_VCVTN_S
+ UNSPEC_VCVTN_U
+ UNSPEC_VCVTP_S
+ UNSPEC_VCVTP_U
UNSPEC_VCVT_S_N
UNSPEC_VCVT_U_N
UNSPEC_VEXT
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ int32x2_t _y = vcvta_s32_f32 (x);
+ int32_t y[2];
+ vst1_s32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5};
+ float32x2_t x2 = vld1_f32 (_x2);
+ int32x2_t _y2 = vcvta_s32_f32 (x2);
+ int32_t y2[2];
+ vst1_s32 (y2, _y2);
+
+ for (int i = 0; i < 2; ++i)
+ if (y2[i] != -1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvta\.s32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ uint32x2_t _y = vcvta_u32_f32 (x);
+ uint32_t y[2];
+ vst1_u32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvta\.u32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ int32x4_t _y = vcvtaq_s32_f32 (x);
+ int32_t y[4];
+ vst1q_s32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+
+ float32_t _x2[]= {-0.5, -0.5, -0.5, -0.5};
+ float32x4_t x2 = vld1q_f32 (_x2);
+ int32x4_t _y2 = vcvtaq_s32_f32 (x2);
+ int32_t y2[4];
+ vst1q_s32 (y2, _y2);
+
+ for (int i = 0; i < 4; ++i)
+ if (y2[i] != -1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvta\.s32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ uint32x4_t _y = vcvtaq_u32_f32 (x);
+ uint32_t y[4];
+ vst1q_u32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvta\.u32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ int32x2_t _y = vcvtm_s32_f32 (x);
+ int32_t y[2];
+ vst1_s32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5};
+ float32x2_t x2 = vld1_f32 (_x2);
+ int32x2_t _y2 = vcvtm_s32_f32 (x2);
+ int32_t y2[2];
+ vst1_s32 (y2, _y2);
+
+ for (int i = 0; i < 2; ++i)
+ if (y2[i] != -1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtm\.s32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ uint32x2_t _y = vcvtm_u32_f32 (x);
+ uint32_t y[2];
+ vst1_u32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtm\.u32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ int32x4_t _y = vcvtmq_s32_f32 (x);
+ int32_t y[4];
+ vst1q_s32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5, -0.5, -0.5};
+ float32x4_t x2 = vld1q_f32 (_x2);
+ int32x4_t _y2 = vcvtmq_s32_f32 (x2);
+ int32_t y2[4];
+ vst1q_s32 (y2, _y2);
+
+ for (int i = 0; i < 4; ++i)
+ if (y2[i] != -1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtm\.s32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ uint32x4_t _y = vcvtmq_u32_f32 (x);
+ uint32_t y[4];
+ vst1q_u32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtm\.u32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ int32x2_t _y = vcvtn_s32_f32 (x);
+ int32_t y[2];
+ vst1_s32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5};
+ float32x2_t x2 = vld1_f32 (_x2);
+ int32x2_t _y2 = vcvtn_s32_f32 (x2);
+ int32_t y2[2];
+ vst1_s32 (y2, _y2);
+
+ for (int i = 0; i < 2; ++i)
+ if (y2[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtn\.s32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ uint32x2_t _y = vcvtn_u32_f32 (x);
+ uint32_t y[2];
+ vst1_u32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtn\.u32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ int32x4_t _y = vcvtnq_s32_f32 (x);
+ int32_t y[4];
+ vst1q_s32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5, -0.5, -0.5};
+ float32x4_t x2 = vld1q_f32 (_x2);
+ int32x4_t _y2 = vcvtnq_s32_f32 (x2);
+ int32_t y2[4];
+ vst1q_s32 (y2, _y2);
+
+ for (int i = 0; i < 4; ++i)
+ if (y2[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtn\.s32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ uint32x4_t _y = vcvtnq_u32_f32 (x);
+ uint32_t y[4];
+ vst1q_u32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtn\.u32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ int32x2_t _y = vcvtp_s32_f32 (x);
+ int32_t y[2];
+ vst1_s32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5};
+ float32x2_t x2 = vld1_f32 (_x2);
+ int32x2_t _y2 = vcvtp_s32_f32 (x2);
+ int32_t y2[2];
+ vst1_s32 (y2, _y2);
+
+ for (int i = 0; i < 2; ++i)
+ if (y2[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtp\.s32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,23 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5};
+ float32x2_t x = vld1_f32 (_x);
+ uint32x2_t _y = vcvtp_u32_f32 (x);
+ uint32_t y[2];
+ vst1_u32 (y, _y);
+
+ for (int i = 0; i < 2; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtp\.u32.f32\[\t\]+\[dD\]\[0-9\]+, ?\[dD\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,33 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ int32x4_t _y = vcvtpq_s32_f32 (x);
+ int32_t y[4];
+ vst1q_s32 (y, _y);
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+
+ float32_t _x2[] = {-0.5, -0.5, -0.5, -0.5};
+ float32x4_t x2 = vld1q_f32 (_x2);
+ int32x4_t _y2 = vcvtpq_s32_f32 (x2);
+ int32_t y2[4];
+ vst1q_s32 (y2, _y2);
+
+ for (int i = 0; i < 4; ++i)
+ if (y2[i] != 0)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtp\.s32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */
new file mode 100644
@@ -0,0 +1,24 @@
+/* { dg-do run } */
+/* { dg-require-effective-target arm_v8_neon_ok } */
+/* { dg-options "-save-temps -O3 -march=armv8-a" } */
+/* { dg-add-options arm_v8_neon } */
+
+#include "arm_neon.h"
+
+int
+main ()
+{
+ float32_t _x[] = {0.5, 0.5, 0.5, 0.5};
+ float32x4_t x = vld1q_f32 (_x);
+ uint32x4_t _y = vcvtpq_u32_f32 (x);
+ uint32_t y[4];
+ vst1q_u32 (y, _y);
+
+
+ for (int i = 0; i < 4; ++i)
+ if (y[i] != 1)
+ __builtin_abort ();
+ return 0;
+}
+
+/* { dg-final { scan-assembler "vcvtp\.u32.f32\[\t\]+\[qQ\]\[0-9\]+, ?\[qQ\]\[0-9\]+\n" } } */