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C PATCH for c/65345 (file-scope _Atomic expansion with floats)

Message ID 5613B0B2.6070003@foss.arm.com
State New
Headers show

Commit Message

Ramana Radhakrishnan Oct. 6, 2015, 11:29 a.m. UTC 
On 06/10/15 10:12, Eric Botcazou wrote:
>> Joseph reminded me that I had forgotten about this patch.  As mentioned
>> here <https://gcc.gnu.org/ml/gcc-patches/2015-04/msg01792.html>, I'm
>> removing the XFAILs in the tests so people are likely to see new FAILs.
>>
>> I think the following targets will need similar fix as the one below:
>> * MIPS
>> * rs6000
>> * alpha
>> * sparc
>> * s390
>> * arm
>> * sh
>> * aarch64
>>
>> I'm CCing the respective maintainers.  You might want to XFAIL those tests.
> 
> Thanks, here are the SPARC bits with an explanation for the other maintainers: 
> create_tmp_var_raw must be used instead of create_tmp_var because the hook can 
> be invoked outside of a function context; likewise for TREE_ADDRESSABLE vs 
> mark_addressable; TARGET_EXPR is needed for variables that are addressable 
> (because their address is taken) to force proper gimplification.
> 
> Tested on SPARC/Solaris, applied on the mainline.
> 
> 
> 	PR c/65345
> 	* config/sparc/sparc.c (sparc_atomic_assign_expand_fenv): Adjust to
> 	use create_tmp_var_raw rather than create_tmp_var.
> 


Thanks for the explanation Eric, by that explanation I do not see the need to adjust for TARGET_EXPR or mark_addressable in the backends.

Here are the patches that I'm testing - I will apply the ARM one after testing finishes - my previous testing broke because of some other reasons.

The AArch64 patch cleared testing - ok to apply ?

regards
Ramana


PR c/65345

	* config/arm/arm-builtins.c (arm_atomic_assign_expand_fenv): Use create_tmp_var_raw instead of create_tmp_var.


PR c/65345

	* config/aarch64/aarch64-builtins.c (aarch64_atomic_assign_expand_fenv): Use create_tmp_var_raw instead of create_tmp_var.
commit 8543c3f0c83059c89dc1e09716dab27e3414d69d
Author: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Date:   Sat Oct 3 00:09:55 2015 +0100

    Fix create_tmp_var_raw ARM
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c
index 80916a9..716ed6e 100644
--- a/gcc/config/aarch64/aarch64-builtins.c
+++ b/gcc/config/aarch64/aarch64-builtins.c
@@ -1462,8 +1462,8 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
        __builtin_aarch64_set_cr (masked_cr);
        __builtin_aarch64_set_sr (masked_sr);  */
 
-  fenv_cr = create_tmp_var (unsigned_type_node);
-  fenv_sr = create_tmp_var (unsigned_type_node);
+  fenv_cr = create_tmp_var_raw (unsigned_type_node);
+  fenv_sr = create_tmp_var_raw (unsigned_type_node);
 
   get_fpcr = aarch64_builtin_decls[AARCH64_BUILTIN_GET_FPCR];
   set_fpcr = aarch64_builtin_decls[AARCH64_BUILTIN_SET_FPCR];
@@ -1476,9 +1476,9 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
 			   ~(AARCH64_FE_ALL_EXCEPT));
 
   ld_fenv_cr = build2 (MODIFY_EXPR, unsigned_type_node,
-		    fenv_cr, build_call_expr (get_fpcr, 0));
+		       fenv_cr, build_call_expr (get_fpcr, 0));
   ld_fenv_sr = build2 (MODIFY_EXPR, unsigned_type_node,
-		    fenv_sr, build_call_expr (get_fpsr, 0));
+		       fenv_sr, build_call_expr (get_fpsr, 0));
 
   masked_fenv_cr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_cr, mask_cr);
   masked_fenv_sr = build2 (BIT_AND_EXPR, unsigned_type_node, fenv_sr, mask_sr);
@@ -1509,7 +1509,7 @@ aarch64_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
 
        __atomic_feraiseexcept (new_fenv_var);  */
 
-  new_fenv_var = create_tmp_var (unsigned_type_node);
+  new_fenv_var = create_tmp_var_raw (unsigned_type_node);
   reload_fenv = build2 (MODIFY_EXPR, unsigned_type_node,
 			new_fenv_var, build_call_expr (get_fpsr, 0));
   restore_fnenv = build_call_expr (set_fpsr, 1, fenv_sr);

Comments

Marcus Shawcroft Oct. 6, 2015, 3:03 p.m. UTC | #1 
On 6 October 2015 at 12:29, Ramana Radhakrishnan
<ramana.radhakrishnan@foss.arm.com> wrote:

> Thanks for the explanation Eric, by that explanation I do not see the need to adjust for TARGET_EXPR or mark_addressable in the backends.
>
> Here are the patches that I'm testing - I will apply the ARM one after testing finishes - my previous testing broke because of some other reasons.
>
> The AArch64 patch cleared testing - ok to apply ?
>

> PR c/65345
>
>         * config/aarch64/aarch64-builtins.c (aarch64_atomic_assign_expand_fenv): Use create_tmp_var_raw instead of create_tmp_var.

OK /Marcus
diff mbox

Patch

diff --git a/gcc/config/arm/arm-builtins.c b/gcc/config/arm/arm-builtins.c
index 0f5a1f1..17cf8e7 100644
--- a/gcc/config/arm/arm-builtins.c
+++ b/gcc/config/arm/arm-builtins.c
@@ -2974,7 +2974,7 @@  arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
 
        __builtin_arm_set_fpscr (masked_fenv);  */
 
-  fenv_var = create_tmp_var (unsigned_type_node);
+  fenv_var = create_tmp_var_raw (unsigned_type_node);
   get_fpscr = arm_builtin_decls[ARM_BUILTIN_GET_FPSCR];
   set_fpscr = arm_builtin_decls[ARM_BUILTIN_SET_FPSCR];
   mask = build_int_cst (unsigned_type_node,
@@ -3001,7 +3001,7 @@  arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update)
 
        __atomic_feraiseexcept (new_fenv_var);  */
 
-  new_fenv_var = create_tmp_var (unsigned_type_node);
+  new_fenv_var = create_tmp_var_raw (unsigned_type_node);
   reload_fenv = build2 (MODIFY_EXPR, unsigned_type_node, new_fenv_var,
 			build_call_expr (get_fpscr, 0));
   restore_fnenv = build_call_expr (set_fpscr, 1, fenv_var);