From patchwork Thu Aug 6 15:56:39 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Cesar Philippidis X-Patchwork-Id: 504736 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B1A7E1402B9 for ; Fri, 7 Aug 2015 01:56:55 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=f0xIb04o; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; q=dns; s=default; b=rZ5UAkY5yvtLHrqgz ZgBJeuw8wdjfEeL9qCyE+95ftJaaeyJsSGhoSCChHKf1uIIW3cw278aKxRh3Y2sB SsyZi5PYY2JDIygAEmgDJfweLqVD+4iIokwsgsNtpf/IgwHupEQUYCs4/o5bdfYa 3UbCgze32yPBSnS+DMHiNLHUhA= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:subject:references :in-reply-to:content-type; s=default; bh=KYC8RuxvhzXliPnhKv1uDVT rQeI=; b=f0xIb04oNzUS2kpbFnK1A5tpOLGrw29VSGC9Mc03JKw3i7ydeGaxZvI GQ0ZXzVwcCpEKMRReEKL+aq/vUNy43lIwrn3v1BdHjggSTjKFT3RhIWUwL1d1dPl UUz+XjAjvLhH4k9Zbqij56Z4hOO93W6cdh7akGQB6J7k/mx9O7u0= Received: (qmail 92139 invoked by alias); 6 Aug 2015 15:56:48 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 92129 invoked by uid 89); 6 Aug 2015 15:56:47 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-0.7 required=5.0 tests=AWL, BAYES_50, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=ham version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Aug 2015 15:56:44 +0000 Received: from svr-orw-fem-03.mgc.mentorg.com ([147.34.97.39]) by relay1.mentorg.com with esmtp id 1ZNNX6-0000yn-9V from Cesar_Philippidis@mentor.com ; Thu, 06 Aug 2015 08:56:40 -0700 Received: from [127.0.0.1] (147.34.91.1) by svr-orw-fem-03.mgc.mentorg.com (147.34.97.39) with Microsoft SMTP Server id 14.3.224.2; Thu, 6 Aug 2015 08:56:39 -0700 Message-ID: <55C383B7.50704@codesourcery.com> Date: Thu, 6 Aug 2015 08:56:39 -0700 From: Cesar Philippidis User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.8.0 MIME-Version: 1.0 To: Nathan Sidwell , GCC Patches Subject: Re: [gomp4] fix spinlock References: <55C31DAB.9040307@acm.org> In-Reply-To: <55C31DAB.9040307@acm.org> On 08/06/2015 01:41 AM, Nathan Sidwell wrote: > I've committed this to fix the spinlock problem Cesar fell over. While > there I added more checking on the worker dimension. I hit a couple of more bugs with the spinlocks. First, the address space argument to membar wasn't being handled properly. Second, nvptx_spinunlock should probably be using atom.exch instead of atom.cas. Finally, ptxas complains about the period prefix to the atom instructions. This patch addresses these problems. Is there a better way to allocate a scratch register for nvptx_spinunlock, or is my solution ok as-is for gomp-4_0-branch? Thanks, Cesar 2015-08-06 Cesar Philippidis gcc/ * config/nvptx/nvptx.c (nvptx_expand_lock_unlock): Pass an additional scratch register to gen_nvptx_spinlock. * config/nvptx/nvptx.md (nvptx_membar): Use %B for the address space operand. (nvptx_spinlock): Remove period prefix from atom. (nvptx_spinunlock): Take additional scratch register argument. Use atom.exch to update the lock. diff --git a/gcc/config/nvptx/nvptx.c b/gcc/config/nvptx/nvptx.c index 2013219..881aea4 100644 --- a/gcc/config/nvptx/nvptx.c +++ b/gcc/config/nvptx/nvptx.c @@ -3327,7 +3327,7 @@ nvptx_expand_lock_unlock (tree exp, bool lock) label); } else - pat = gen_nvptx_spinunlock (mem, space); + pat = gen_nvptx_spinunlock (mem, space, gen_reg_rtx (SImode)); emit_insn (pat); if (lock) emit_insn (barrier); diff --git a/gcc/config/nvptx/nvptx.md b/gcc/config/nvptx/nvptx.md index 8cd8300..fb88c72 100644 --- a/gcc/config/nvptx/nvptx.md +++ b/gcc/config/nvptx/nvptx.md @@ -1569,7 +1569,7 @@ [(unspec_volatile [(match_operand:SI 0 "const_int_operand" "")] UNSPECV_MEMBAR)] "" - "membar%M0;") + "membar%B0;") ;; spinlock and unlock (define_insn "nvptx_spinlock" @@ -1581,11 +1581,12 @@ (match_operand:BI 3 "register_operand" "=R") (label_ref (match_operand 4 "" ""))])] "" - "%4:\\t.atom%R1.cas.b32 %2,%0,0,1;setp.ne.u32 %3,%2,0;@%3 bra.uni %4;") + "%4:\\tatom%R1.cas.b32 %2,%0,0,1;setp.ne.u32 %3,%2,0;@%3 bra.uni %4;") (define_insn "nvptx_spinunlock" [(unspec_volatile [(match_operand:SI 0 "memory_operand" "m") (match_operand:SI 1 "const_int_operand" "i")] - UNSPECV_UNLOCK)] + UNSPECV_UNLOCK) + (match_operand:SI 2 "register_operand" "=R")] "" - ".atom%R1.cas.b32 %0,1,0;") + "atom%R1.exch.b32 %2,%0,0;")