From patchwork Thu Jul 30 15:50:27 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Renlin Li X-Patchwork-Id: 502195 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 169EC1402BF for ; Fri, 31 Jul 2015 01:50:44 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=L0tPtV6V; dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=j2c2+ebdnoz4LRev73v3V6/iejM7gSUt27/c07tmW9/ L0VtEqbsrjlYbqJdX/9Nv4Atf0GHCFWazxlZkxL7qbVK5KPc+jaXaUBH6X5XWKux Yi16REzGRgHVX+0DbdNcw7fXYYQycKZsbBy002zw86A2EfOw4MHPCyZgZhruLWw4 = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=WDfXLoP3Y5T8QNPp/b37HfBCjP8=; b=L0tPtV6V/wLeVoTL9 d65P0xQlQxSjX6CRPEOGZgBo6IpNWPFw7F3hB8yaLZhRrgBLI6lliXzaEmzZSn7j n2X2RNPSpv5KqNSmGMKDb8iNILnQrghLeF+1pTtmgrCweAPSCfzFytAhqpawxmGw yCo1aCoVCjdVEbn4gpmLd/c5PY= Received: (qmail 112930 invoked by alias); 30 Jul 2015 15:50:37 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 112920 invoked by uid 89); 30 Jul 2015 15:50:36 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.7 required=5.0 tests=AWL, BAYES_00, SPF_PASS autolearn=ham version=3.3.2 X-HELO: eu-smtp-delivery-143.mimecast.com Received: from eu-smtp-delivery-143.mimecast.com (HELO eu-smtp-delivery-143.mimecast.com) (146.101.78.143) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 30 Jul 2015 15:50:35 +0000 Received: from cam-owa1.Emea.Arm.com (fw-tnat.cambridge.arm.com [217.140.96.140]) by eu-smtp-1.mimecast.com with ESMTP id uk-mta-31-l02mArLORsCe2v8s7tY74w-1; Thu, 30 Jul 2015 16:50:30 +0100 Received: from [10.2.207.43] ([10.1.2.79]) by cam-owa1.Emea.Arm.com with Microsoft SMTPSVC(6.0.3790.3959); Thu, 30 Jul 2015 16:50:27 +0100 Message-ID: <55BA47C3.80207@arm.com> Date: Thu, 30 Jul 2015 16:50:27 +0100 From: Renlin Li User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.7.0 MIME-Version: 1.0 To: "gcc-patches@gcc.gnu.org" CC: Ramana Radhakrishnan , Marcus Shawcroft Subject: [PATCH][AARCH64]Add backend combine_bfi pattern. X-MC-Unique: l02mArLORsCe2v8s7tY74w-1 Hi all, This insn should match the following similar rtx pattern and remove the redundant zero_extend operation if the width of zero_extract and inner-size of zero_extend totally match. (set (zero_extract:SI (reg/i:SI 0 x0) (const_int 8 [0x8]) (const_int 0 [0])) (zero_extend:SI (reg:QI 1 x1 [ y ]))) aarch64-none-elf regression tests Okay. Okay to commit? Regards, Renlin gcc/ChangeLog: 2015-07-30 Renlin Li * config/aarch64/aarch64.md (combine_bfi): New pattern. gcc/testsuite/ChangeLog: 2015-07-30 Renlin Li * gcc.target/aarch64/combine-bfi.c: New. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 1dbadc0..858fe77 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3903,6 +3903,16 @@ [(set_attr "type" "bfm")] ) +(define_insn "*combine_bfi" + [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") + (match_operand 1 "const_int_operand" "n") + (match_operand 2 "const_int_operand" "n")) + (zero_extend:GPI (match_operand:ALLX 3 "register_operand" "r")))] + "UINTVAL (operands[1]) == " + "bfi\\t%0, %3, %2, %1" + [(set_attr "type" "bfm")] +) + (define_insn "*extr_insv_lower_reg" [(set (zero_extract:GPI (match_operand:GPI 0 "register_operand" "+r") (match_operand 1 "const_int_operand" "n") diff --git a/gcc/testsuite/gcc.target/aarch64/combine-bfi.c b/gcc/testsuite/gcc.target/aarch64/combine-bfi.c new file mode 100644 index 0000000..06331f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/combine-bfi.c @@ -0,0 +1,34 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -fdump-rtl-combine" } */ + +int +f1 (int x, int y) +{ + return (x & ~0x0ffff00) | ((y << 8) & 0x0ffff00); +} + +int +f2 (int x, int y) +{ + return (x & ~0x0ff000) | ((y & 0x0ff) << 12); +} + +int +f3 (int x, int y) +{ + return (x & ~0xffff) | (y & 0xffff); +} + +int +f4 (int x, int y) +{ + return (x & ~0xff) | (y & 0xff); +} + +long +f5 (long x, long y) +{ + return (x & ~0xffffffffull) | (y & 0xffffffff); +} + +/* { dg-final { scan-rtl-dump-times "\\*combine_bfi" 5 "combine" } } */