From patchwork Thu Apr 16 16:49:49 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georg-Johann Lay X-Patchwork-Id: 461818 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B47001402E1 for ; Fri, 17 Apr 2015 02:50:05 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=TRjx0EVQ; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; 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auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-1.1 required=5.0 tests=AWL, BAYES_00, KAM_ASCII_DIVIDERS, RCVD_IN_DNSWL_NONE autolearn=no version=3.3.2 X-HELO: mo4-p00-ob.smtp.rzone.de Received: from mo4-p00-ob.smtp.rzone.de (HELO mo4-p00-ob.smtp.rzone.de) (81.169.146.161) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Thu, 16 Apr 2015 16:49:55 +0000 X-RZG-AUTH: :LXoWVUeid/7A29J/hMvvT3ol15ykJcYwTPbBBR62PQx1xqvTHw== X-RZG-CLASS-ID: mo00 Received: from [192.168.0.22] (ip5b43a95f.dynamic.kabel-deutschland.de [91.67.169.95]) by smtp.strato.de (RZmta 37.5 DYNA|AUTH) with ESMTPSA id y01737r3GGnnHaF (using TLSv1.2 with cipher ECDHE-RSA-AES256-SHA (curve secp521r1 with 521 ECDH bits, eq. 15360 bits RSA)) (Client did not present a certificate); Thu, 16 Apr 2015 18:49:49 +0200 (CEST) Message-ID: <552FE82D.5040501@gjlay.de> Date: Thu, 16 Apr 2015 18:49:49 +0200 From: Georg-Johann Lay User-Agent: Mozilla/5.0 (X11; Linux i686; rv:31.0) Gecko/20100101 Thunderbird/31.6.0 MIME-Version: 1.0 To: Senthil Kumar Selvaraj CC: gcc-patches@gcc.gnu.org, chertykov@gmail.com Subject: Re: [patch, avr] Fix PR 65657 - read from __memx address space tramples arguments to function call References: <20150416064347.GA31491@atmel.com> <552F7A8D.1080709@gjlay.de> <20150416092802.GC31491@atmel.com> <552FE79E.2040509@gjlay.de> In-Reply-To: <552FE79E.2040509@gjlay.de> X-IsSubscribed: yes ...and the sketch against 4.9 Index: config/avr/avr.c =================================================================== --- config/avr/avr.c (revision 221321) +++ config/avr/avr.c (working copy) @@ -287,6 +287,94 @@ avr_to_int_mode (rtx x) } +static void +avr_rest_of_handle_expand_xload (void) +{ + basic_block bb; + + FOR_EACH_BB_FN (bb, cfun) + { + rtx insn, next; + + FOR_BB_INSNS_SAFE (bb, insn, next) + { + enum attr_fixregs fixregs; + + if (-1 == recog_memoized (insn) + || FIXREGS_NO == (fixregs = get_attr_fixregs (insn))) + { + continue; + } + + avr_edump ("%?: Must fix insn:\n %r\n\n", insn); + if (dump_file) + avr_fdump (dump_file, ";; Fixing insn :\n %r\n\n", insn); + + extract_insn (insn); + + switch (fixregs) + { + default: + gcc_unreachable(); + + case FIXREGS_XLOADQI_A: + if (dump_file) + avr_fdump (dump_file, "$2 = %r\n\n", recog_data.operand[2]); + break; + + case FIXREGS_XLOAD_A: + if (dump_file) + { + avr_fdump (dump_file, "$2 = %r\n", recog_data.operand[2]); + avr_fdump (dump_file, "$3 = %r\n", recog_data.operand[3]); + avr_fdump (dump_file, "$4 = %r\n\n", recog_data.operand[4]); + } + break; + } + } // insn + } +} + + +static const pass_data avr_pass_data_expand_xload = +{ + RTL_PASS, // type + "", // name (will be patched) + OPTGROUP_NONE, // optinfo_flags + false, // has_gate + true, // has_execute + TV_NONE, // tv_id + 0, // properties_required + 0, // properties_provided + 0, // properties_destroyed + 0, // todo_flags_start + // todo_flags_finish + TODO_df_finish | TODO_verify_rtl_sharing | TODO_verify_flow +}; + + +class avr_pass_expand_xload : public rtl_opt_pass +{ +public: + avr_pass_expand_xload (gcc::context *ctxt, const char *name) + : rtl_opt_pass (avr_pass_data_expand_xload, ctxt) + { + this->name = name; + } + + unsigned int execute (void) + { + df_lr_add_problem (); + df_live_add_problem (); + df_analyze (); + + avr_rest_of_handle_expand_xload(); + + return 0; + } +}; // avr_pass_recompute_notes + + static const pass_data avr_pass_data_recompute_notes = { RTL_PASS, // type @@ -326,6 +414,11 @@ public: static void avr_register_passes (void) { + /* This avr-specific fixed PR63633 for the case of mov insns. */ + + register_pass (new avr_pass_expand_xload (g, "avr-expand-xload"), + PASS_POS_INSERT_BEFORE, "split1", 1); + /* This avr-specific pass (re)computes insn notes, in particular REG_DEAD notes which are used by `avr.c::reg_unused_after' and branch offset computations. These notes must be correct, i.e. there must be no Index: config/avr/avr.md =================================================================== --- config/avr/avr.md (revision 221321) +++ config/avr/avr.md (working copy) @@ -165,6 +165,13 @@ (define_attr "isa" standard" (const_string "standard")) + +(define_attr "fixregs" + "xload_A, xloadQI_A, + no" + (const_string "no")) + + (define_attr "enabled" "" (cond [(eq_attr "isa" "standard") (const_int 1) @@ -494,9 +501,9 @@ (define_insn "load__libgcc" ;; "xload8qi_A" ;; "xload8qq_A" "xload8uqq_A" (define_insn_and_split "xload8_A" - [(set (match_operand:ALL1 0 "register_operand" "=r") - (match_operand:ALL1 1 "memory_operand" "m")) - (clobber (reg:HI REG_Z))] + [(set (match_operand:ALL1 0 "register_operand" "=r") + (match_operand:ALL1 1 "memory_operand" "m")) + (clobber (match_operand:HI 2 "scratch_operand" "=z"))] ;; HI 30 "can_create_pseudo_p() && !avr_xload_libgcc_p (mode) && avr_mem_memx_p (operands[1]) @@ -505,6 +512,8 @@ (define_insn_and_split "xload8_A" "&& 1" [(clobber (const_int 0))] { + gcc_assert (SCRATCH != GET_CODE (operands[2])); + /* ; Split away the high part of the address. GCC's register allocator ; in not able to allocate segment registers and reload the resulting ; expressions. Notice that no address register can hold a PSImode. */ @@ -520,7 +529,9 @@ (define_insn_and_split "xload8_A" set_mem_addr_space (SET_SRC (single_set (insn)), MEM_ADDR_SPACE (operands[1])); DONE; - }) + } + [(set_attr "fixregs" "xloadQI_A")]) + ;; "xloadqi_A" "xloadqq_A" "xloaduqq_A" ;; "xloadhi_A" "xloadhq_A" "xloaduhq_A" "xloadha_A" "xloaduha_A" @@ -530,9 +541,9 @@ (define_insn_and_split "xload8_A" (define_insn_and_split "xload_A" [(set (match_operand:MOVMODE 0 "register_operand" "=r") (match_operand:MOVMODE 1 "memory_operand" "m")) - (clobber (reg:MOVMODE 22)) - (clobber (reg:QI 21)) - (clobber (reg:HI REG_Z))] + (clobber (match_operand:MOVMODE 2 "scratch_operand" "=r")) ;; MOVMODE 22 + (clobber (match_operand:QI 3 "scratch_operand" "=r")) ;; QI 21 + (clobber (match_operand:HI 4 "scratch_operand" "=z"))] ;; HI 30 (Z) "can_create_pseudo_p() && avr_mem_memx_p (operands[1]) && REG_P (XEXP (operands[1], 0))" @@ -540,6 +551,10 @@ (define_insn_and_split "xload_A" "&& 1" [(clobber (const_int 0))] { + gcc_assert (SCRATCH != GET_CODE (operands[2])); + gcc_assert (SCRATCH != GET_CODE (operands[3])); + gcc_assert (SCRATCH != GET_CODE (operands[4])); + rtx addr = XEXP (operands[1], 0); rtx reg_z = gen_rtx_REG (HImode, REG_Z); rtx addr_hi8 = simplify_gen_subreg (QImode, addr, PSImode, 2); @@ -558,7 +573,9 @@ (define_insn_and_split "xload_A" emit_move_insn (operands[0], gen_rtx_REG (mode, 22)); DONE; - }) + } + [(set_attr "fixregs" "xload_A")]) + ;; Move value from address space memx to a register ;; These insns must be prior to respective generic move insn. @@ -638,10 +655,10 @@ (define_expand "mov" if (!avr_xload_libgcc_p (mode)) /* ; No here because gen_xload8_A only iterates over ALL1. ; insn-emit does not depend on the mode, it's all about operands. */ - emit_insn (gen_xload8qi_A (dest, src)); + emit_insn (gen_xload8qi_A (dest, src, gen_rtx_SCRATCH (HImode))); else - emit_insn (gen_xload_A (dest, src)); - + emit_insn (gen_xload_A (dest, src, gen_rtx_SCRATCH (mode), + gen_rtx_SCRATCH (QImode), gen_rtx_SCRATCH (HImode))); DONE; }