From patchwork Fri Mar 27 13:03:54 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bernd Schmidt X-Patchwork-Id: 455404 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id DB6351400DE for ; Sat, 28 Mar 2015 00:04:12 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=pass reason="1024-bit key; unprotected key" header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b=myXZAbOT; dkim-adsp=none (unprotected policy); dkim-atps=neutral DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=VHDfqps9vNobj8K8X wUpHERe3H4vbFz80yF6YmWInmTsF/6Kindqz0HofrjqfWr0npx6AoYOu/fymMpU2 QHylN7msEgmvDQ6Wvvx9CBRU39YoozXFGz/YdeoMWMlS7pjDy2kAx+TfhW13wo4x dA40VqlUD8b47PaSBcmuVY/I9I= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=GG8Zusw5VFW+dMyqefGMvbp HV4g=; b=myXZAbOTle4GQG5Kwab1RbdIjC+vaO0DD9sNONi8FB+qGRxWhb5lUuc fwBEBFrz39TwlsKOipuBMutMi0kWOV0cfLAX+5EuVjdaWjV33YRlKy9etqwSD4Pk o9GKTwoN0IxT94Z+x50lbaM6XaaI+DkZ3LcsIMxgogBq7Pv2K9Zc= Received: (qmail 10844 invoked by alias); 27 Mar 2015 13:04:04 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 10805 invoked by uid 89); 27 Mar 2015 13:04:04 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.4 required=5.0 tests=AWL, BAYES_00, MEDICAL_SUBJECT, RCVD_IN_DNSWL_LOW, SPF_PASS autolearn=no version=3.3.2 X-HELO: relay1.mentorg.com Received: from relay1.mentorg.com (HELO relay1.mentorg.com) (192.94.38.131) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Fri, 27 Mar 2015 13:04:02 +0000 Received: from nat-ies.mentorg.com ([192.94.31.2] helo=SVR-IES-FEM-03.mgc.mentorg.com) by relay1.mentorg.com with esmtp id 1YbTvZ-0000ax-TX from Bernd_Schmidt@mentor.com ; Fri, 27 Mar 2015 06:03:58 -0700 Received: from [127.0.0.1] (137.202.0.76) by SVR-IES-FEM-03.mgc.mentorg.com (137.202.0.108) with Microsoft SMTP Server id 14.3.224.2; Fri, 27 Mar 2015 13:03:56 +0000 Message-ID: <5515553A.7080303@codesourcery.com> Date: Fri, 27 Mar 2015 14:03:54 +0100 From: Bernd Schmidt User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.5.0 MIME-Version: 1.0 To: Chen Gang , Jeff Law CC: gcc-patches List Subject: Re: [PATCH] gcc/config/c6x/c6x.md: Remove "clobber (match_scratch ...)" in "movmisalign_store". References: In-Reply-To: On 03/27/2015 01:05 AM, Chen Gang wrote: > For misalignment memory access, c6x gcc will cause issue, so need remove > "clobber (match_scratch ...)" which will be symmetric with "movmisalign > _load", then pass compiling and generate correct assembly code. > > * config/c6x/c6x.md (movmisalign_store): Remove "clobber > (match_scratch ...)". No, that just will make the compiler confuse loads and stores. I've committed the following to fix it (I thought I'd done so a year ago, but probably it was one of those commit against an out-of-date tree situations and it didn't go through). Bernd diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8e4b6c1..d5535f9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,8 @@ 2015-03-27 Bernd Schmidt + * config/c6x/c6x.md (movmisalign): Use MEM_P, not + memory_operand. + PR target/65052 * config/c6x/constraints.md (S3): New constraint. * config/c6x/c6x.md (real_jump): Use it. diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md index fafefa6..e957eca 100644 --- a/gcc/config/c6x/c6x.md +++ b/gcc/config/c6x/c6x.md @@ -775,7 +775,7 @@ UNSPEC_MISALIGNED_ACCESS))] "TARGET_INSNS_64" { - if (memory_operand (operands[0], mode)) + if (MEM_P (operands[0])) { emit_insn (gen_movmisalign_store (operands[0], operands[1])); DONE;