From patchwork Wed Feb 4 23:33:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Matthias Klose X-Patchwork-Id: 436526 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 6CDE514017C for ; Thu, 5 Feb 2015 10:34:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; q=dns; s=default; b=REjZKH13XRYdDRpL5 CoMbZU9MgrmO94IpcLg8jbb4QtqmYb4zS99W+AN2yoetd1jj4ZMN3cj9i3ogFKKg K4kjM2wvJZpAnePhufq1PY4+0w48BCmbpnXLdkLLjhoe/IBZuGST69PhSehlc5jn n2wrCkMavlEiXk3W0z6tRFt1K0= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:references :in-reply-to:content-type; s=default; bh=Gm/wu9aA8j4i1AI6V+5ob3D 5GG8=; b=Fx/gp31dJfSIPzR38gOyjk2EgD0x1w3TUTwNGDOtrrSpTGvAoq6T0bM xsIbKF8+Qd93BhXenlZgr2YqDNyCLPmjG5gjA93S+UmrcepWKSVfTiUQRVp6ou5H 3q9nkR/UHHTiXEuFXE/9yM+ofB3nsjdENYy7ygGs3Wo7pJurmDq4= Received: (qmail 18931 invoked by alias); 4 Feb 2015 23:33:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 18884 invoked by uid 89); 4 Feb 2015 23:33:28 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.6 required=5.0 tests=AWL, BAYES_00, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 X-HELO: einhorn.in-berlin.de Received: from einhorn.in-berlin.de (HELO einhorn.in-berlin.de) (192.109.42.8) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Wed, 04 Feb 2015 23:33:27 +0000 X-Envelope-From: doko@ubuntu.com Received: from [192.168.42.218] (dslb-088-073-085-203.088.073.pools.vodafone-ip.de [88.73.85.203]) (authenticated bits=0) by einhorn.in-berlin.de (8.14.4/8.14.4/Debian-4) with ESMTP id t14NXK35009344 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NOT); Thu, 5 Feb 2015 00:33:22 +0100 Message-ID: <54D2AC3E.8040502@ubuntu.com> Date: Thu, 05 Feb 2015 00:33:18 +0100 From: Matthias Klose User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:31.0) Gecko/20100101 Thunderbird/31.4.0 MIME-Version: 1.0 To: =?UTF-8?B?TWFydGluIExpxaFrYQ==?= , GCC Patches CC: "hubick >> Jan Hubicka" , Wei Mi Subject: Re: [PATCH] Fix PR64068 and PR64559 References: <54B7F782.4020405@suse.cz> In-Reply-To: <54B7F782.4020405@suse.cz> On 01/15/2015 06:23 PM, Martin Liška wrote: > Hello. > > This is Honsa's patch that I've just tested on x86_64-linux-pc. The patch is > preapproved by Honza > and is going to be installed. backporting the fix for PR63970 introduced PR64938. Backporting this patch as well fixes the ICE reported in PR64938. Honza approved the backport on IRC. Matthias # DP: Proposed fix for PR target/64893 (AArch64) commit 455a54f36a205af281b3fe8dbc97916ede704ca8 Author: Andrew Pinski Date: Mon Feb 2 18:40:08 2015 +0000 Fix bug 64893: ICE with vget_lane_u32 with C++ front-end PR target/64893 * config/aarch64/aarch64-builtins.c (aarch64_init_simd_builtins): Change the first argument type to size_type_node and add another size_type_node. (aarch64_simd_expand_builtin): Handle the new argument to AARCH64_SIMD_BUILTIN_LANE_CHECK and don't ICE but rather print sorry out when the first two arguments are not integer constants. * config/aarch64/arm_neon.h (__AARCH64_LANE_CHECK): Pass the sizeof directly to __builtin_aarch64_im_lane_boundsi. * testsuite/c-c++-common/torture/aarch64-vect-lane-1.c: New testcase. --- a/src/gcc/config/aarch64/aarch64-builtins.c +++ b/src/gcc/config/aarch64/aarch64-builtins.c @@ -712,7 +712,8 @@ aarch64_init_simd_builtins (void) aarch64_init_simd_builtin_scalar_types (); tree lane_check_fpr = build_function_type_list (void_type_node, - intSI_type_node, + size_type_node, + size_type_node, intSI_type_node, NULL); aarch64_builtin_decls[AARCH64_SIMD_BUILTIN_LANE_CHECK] = @@ -1001,13 +1002,18 @@ aarch64_simd_expand_builtin (int fcode, tree exp, rtx target) { if (fcode == AARCH64_SIMD_BUILTIN_LANE_CHECK) { - tree nlanes = CALL_EXPR_ARG (exp, 0); - gcc_assert (TREE_CODE (nlanes) == INTEGER_CST); - rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 1)); - if (CONST_INT_P (lane_idx)) - aarch64_simd_lane_bounds (lane_idx, 0, TREE_INT_CST_LOW (nlanes), exp); + rtx totalsize = expand_normal (CALL_EXPR_ARG (exp, 0)); + rtx elementsize = expand_normal (CALL_EXPR_ARG (exp, 1)); + if (CONST_INT_P (totalsize) && CONST_INT_P (elementsize)) + { + rtx lane_idx = expand_normal (CALL_EXPR_ARG (exp, 2)); + if (CONST_INT_P (lane_idx)) + aarch64_simd_lane_bounds (lane_idx, 0, UINTVAL (totalsize)/UINTVAL (elementsize), exp); + else + error ("%Klane index must be a constant immediate", exp); + } else - error ("%Klane index must be a constant immediate", exp); + sorry ("%Ktotal size and element size must be a constant immediate", exp); /* Don't generate any RTL. */ return const0_rtx; } --- a/src/gcc/config/aarch64/arm_neon.h +++ b/src/gcc/config/aarch64/arm_neon.h @@ -541,7 +541,7 @@ typedef struct poly16x8x4_t #define __AARCH64_NUM_LANES(__v) (sizeof (__v) / sizeof (__v[0])) #define __AARCH64_LANE_CHECK(__vec, __idx) \ - __builtin_aarch64_im_lane_boundsi (__AARCH64_NUM_LANES (__vec), __idx) + __builtin_aarch64_im_lane_boundsi (sizeof(__vec), sizeof(__vec[0]), __idx) /* For big-endian, GCC's vector indices are the opposite way around to the architectural lane indices used by Neon intrinsics. */ --- /dev/null +++ b/src/gcc/testsuite/c-c++-common/torture/aarch64-vect-lane-1.c @@ -0,0 +1,8 @@ +// { dg-do compile { target "aarch64*-*-*" } } +#include +int +search_line_fast (uint32x2_t t) +{ + return vget_lane_u32 (t, 0); +} +