diff mbox

[AArch64] Rename [u]int32x1_t to [u]int32_t (resp 16x1, 8x1) in arm_neon.h

Message ID 53D0DD61.8050901@arm.com
State New
Headers show

Commit Message

Alan Lawrence July 24, 2014, 10:18 a.m. UTC 
The ACLE spec does not mention the int32x1_t, uint32x1_t, int16x1_t, uint16x1_t, 
int8x1_t or uint8x1_t types currently in arm_neon.h, but just 'standard' types 
int32_t, int16_t, etc. This patch is a global search-and-replace across 
arm_neon.h (and the tests that depend on it).

Regressed (check-gcc and check-g++) on aarch64-none-elf.

The question of backporting to 4.9 has been raised internally. There is no ABI 
issue, as int32x1_t was merely a typedef to int32_t (etc.). However there is a 
source code compatibility issue; code mentioning the 32x1 types, i.e. not 
conforming to the ACLE spec, which previously compiled, will no longer do so. My 
personal feeling is therefore not to backport this, but I would welcome input 
from maintainers (and others)...?

Cheers, Alan

gcc/ChangeLog:

	* config/aarch64/arm_neon.h (int32x1_t, int16x1_t, int8x1_t,
	uint32x1_t, uint16x1_t, uint8x1_t): Remove typedefs.

	(vqabsb_s8, vqabsh_s16, vqabss_s32, vqaddb_s8, vqaddh_s16, vqadds_s32,
	vqaddb_u8, vqaddh_u16, vqadds_u32, vqdmlalh_s16, vqdmlalh_lane_s16,
	vqdmlals_s32, vqdmlals_lane_s32, vqdmlslh_s16, vqdmlslh_lane_s16,
	vqdmlsls_s32, vqdmlsls_lane_s32, vqdmulhh_s16, vqdmulhh_lane_s16,
	vqdmulhs_s32, vqdmulhs_lane_s32, vqdmullh_s16, vqdmullh_lane_s16,
	vqdmulls_s32, vqdmulls_lane_s32, vqmovnh_s16, vqmovns_s32,
	vqmovnh_u16, vqmovns_u32, vqmovunh_s16, vqmovuns_s32, vqnegb_s8,
	vqnegh_s16, vqnegs_s32, vqrdmulhh_s16, vqrdmulhh_lane_s16,
	vqrdmulhs_s32, vqrdmulhs_lane_s32, vqrshlb_s8, vqrshlh_s16,
	vqrshls_s32, vqrshlb_u8, vqrshlh_u16, vqrshls_u32, vqrshrnh_n_s16,
	vqrshrns_n_s32, vqrshrnh_n_u16, vqrshrns_n_u32, vqrshrunh_n_s16,
	vqrshruns_n_s32, vqshlb_s8, vqshlh_s16, vqshls_s32, vqshlb_u8,
	vqshlh_u16, vqshls_u32, vqshlb_n_s8, vqshlh_n_s16, vqshls_n_s32,
	vqshlb_n_u8, vqshlh_n_u16, vqshls_n_u32, vqshlub_n_s8, vqshluh_n_s16,
	vqshlus_n_s32, vqshrnh_n_s16, vqshrns_n_s32, vqshrnh_n_u16,
	vqshrns_n_u32, vqshrunh_n_s16, vqshruns_n_s32, vqsubb_s8, vqsubh_s16,
	vqsubs_s32, vqsubb_u8, vqsubh_u16, vqsubs_u32, vsqaddb_u8,
	vsqaddh_u16, vsqadds_u32, vuqaddb_s8, vuqaddh_s16, vuqadds_s32):
	Replace all int{32,16,8}x1_t with int{32,16,8}_t.

gcc/testsuite/ChangeLog:

	* gcc.target/aarch64/scalar_intrinsics.c (*): Replace all
	int{32,16,8}x1_t with int{32,16,8}_t.
	* gcc.target/aarch64/simd/vqdmlalh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlals_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlslh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmlsls_lane_s32.c: Likewise.
	* gcc.target/aarch64/simd/vqdmullh_lane_s16.c: Likewise.
	* gcc.target/aarch64/simd/vqdmulls_lane_s32.c: Likewise.

Comments

Marcus Shawcroft Sept. 2, 2014, 2:44 p.m. UTC | #1 
On 24 July 2014 11:18, Alan Lawrence <alan.lawrence@arm.com> wrote:
> The ACLE spec does not mention the int32x1_t, uint32x1_t, int16x1_t,
> uint16x1_t, int8x1_t or uint8x1_t types currently in arm_neon.h, but just
> 'standard' types int32_t, int16_t, etc. This patch is a global
> search-and-replace across arm_neon.h (and the tests that depend on it).
>
> Regressed (check-gcc and check-g++) on aarch64-none-elf.


OK for trunk.

> The question of backporting to 4.9 has been raised internally. There is no
> ABI issue, as int32x1_t was merely a typedef to int32_t (etc.). However
> there is a source code compatibility issue; code mentioning the 32x1 types,
> i.e. not conforming to the ACLE spec, which previously compiled, will no
> longer do so. My personal feeling is therefore not to backport this, but I
> would welcome input from maintainers (and others)...?

I doubt that there is currently much code out there that will be
affected by this change and that it would be better to back port and
hence limit the amount of code written against the broken arm_neon.h
during the life of the 4.9.x series. If there are no objections to
back porting in the next couple of days then go ahead.

/Marcus
diff mbox

Patch

diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h
index 83ac5e96d422ceccadcb212ec792665b78c03fae..2e54c01aa068c1680b068592bbdfd011ee4b7cf8 100644
--- a/gcc/config/aarch64/arm_neon.h
+++ b/gcc/config/aarch64/arm_neon.h
@@ -40,9 +40,6 @@  typedef __builtin_aarch64_simd_si int32x2_t
   __attribute__ ((__vector_size__ (8)));
 typedef __builtin_aarch64_simd_di int64x1_t
   __attribute__ ((__vector_size__ (8)));
-typedef int32_t int32x1_t;
-typedef int16_t int16x1_t;
-typedef int8_t int8x1_t;
 typedef __builtin_aarch64_simd_df float64x1_t
   __attribute__ ((__vector_size__ (8)));
 typedef __builtin_aarch64_simd_sf float32x2_t
@@ -59,9 +56,6 @@  typedef __builtin_aarch64_simd_usi uint32x2_t
   __attribute__ ((__vector_size__ (8)));
 typedef __builtin_aarch64_simd_udi uint64x1_t
   __attribute__ ((__vector_size__ (8)));
-typedef uint32_t uint32x1_t;
-typedef uint16_t uint16x1_t;
-typedef uint8_t uint8x1_t;
 typedef __builtin_aarch64_simd_qi int8x16_t
   __attribute__ ((__vector_size__ (16)));
 typedef __builtin_aarch64_simd_hi int16x8_t
@@ -19203,22 +19197,22 @@  vqabsq_s64 (int64x2_t __a)
   return (int64x2_t) __builtin_aarch64_sqabsv2di (__a);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqabsb_s8 (int8x1_t __a)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqabsb_s8 (int8_t __a)
 {
-  return (int8x1_t) __builtin_aarch64_sqabsqi (__a);
+  return (int8_t) __builtin_aarch64_sqabsqi (__a);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqabsh_s16 (int16x1_t __a)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqabsh_s16 (int16_t __a)
 {
-  return (int16x1_t) __builtin_aarch64_sqabshi (__a);
+  return (int16_t) __builtin_aarch64_sqabshi (__a);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqabss_s32 (int32x1_t __a)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqabss_s32 (int32_t __a)
 {
-  return (int32x1_t) __builtin_aarch64_sqabssi (__a);
+  return (int32_t) __builtin_aarch64_sqabssi (__a);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -19229,22 +19223,22 @@  vqabsd_s64 (int64_t __a)
 
 /* vqadd */
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqaddb_s8 (int8x1_t __a, int8x1_t __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqaddb_s8 (int8_t __a, int8_t __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqaddqi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqaddqi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqaddh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqaddh_s16 (int16_t __a, int16_t __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqaddhi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqaddhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqadds_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqadds_s32 (int32_t __a, int32_t __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqaddsi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqaddsi (__a, __b);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -19253,22 +19247,22 @@  vqaddd_s64 (int64_t __a, int64_t __b)
   return __builtin_aarch64_sqadddi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqaddb_u8 (uint8x1_t __a, uint8x1_t __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqaddb_u8 (uint8_t __a, uint8_t __b)
 {
-  return (uint8x1_t) __builtin_aarch64_uqaddqi_uuu (__a, __b);
+  return (uint8_t) __builtin_aarch64_uqaddqi_uuu (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqaddh_u16 (uint16x1_t __a, uint16x1_t __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqaddh_u16 (uint16_t __a, uint16_t __b)
 {
-  return (uint16x1_t) __builtin_aarch64_uqaddhi_uuu (__a, __b);
+  return (uint16_t) __builtin_aarch64_uqaddhi_uuu (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vqadds_u32 (uint32x1_t __a, uint32x1_t __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vqadds_u32 (uint32_t __a, uint32_t __b)
 {
-  return (uint32x1_t) __builtin_aarch64_uqaddsi_uuu (__a, __b);
+  return (uint32_t) __builtin_aarch64_uqaddsi_uuu (__a, __b);
 }
 
 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
@@ -19379,26 +19373,26 @@  vqdmlal_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
   return __builtin_aarch64_sqdmlal_nv2si (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmlalh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmlalh_s16 (int32_t __a, int16_t __b, int16_t __c)
 {
   return __builtin_aarch64_sqdmlalhi (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmlalh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x4_t __c, const int __d)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmlalh_lane_s16 (int32_t __a, int16_t __b, int16x4_t __c, const int __d)
 {
   return __builtin_aarch64_sqdmlal_lanehi (__a, __b, __c, __d);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
-vqdmlals_s32 (int64_t __a, int32x1_t __b, int32x1_t __c)
+vqdmlals_s32 (int64_t __a, int32_t __b, int32_t __c)
 {
   return __builtin_aarch64_sqdmlalsi (__a, __b, __c);
 }
 
 __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
-vqdmlals_lane_s32 (int64x1_t __a, int32x1_t __b, int32x2_t __c, const int __d)
+vqdmlals_lane_s32 (int64x1_t __a, int32_t __b, int32x2_t __c, const int __d)
 {
   return (int64x1_t)
       {__builtin_aarch64_sqdmlal_lanesi (__a[0], __b, __c, __d)};
@@ -19506,26 +19500,26 @@  vqdmlsl_n_s32 (int64x2_t __a, int32x2_t __b, int32_t __c)
   return __builtin_aarch64_sqdmlsl_nv2si (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmlslh_s16 (int32x1_t __a, int16x1_t __b, int16x1_t __c)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmlslh_s16 (int32_t __a, int16_t __b, int16_t __c)
 {
   return __builtin_aarch64_sqdmlslhi (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmlslh_lane_s16 (int32x1_t __a, int16x1_t __b, int16x4_t __c, const int __d)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmlslh_lane_s16 (int32_t __a, int16_t __b, int16x4_t __c, const int __d)
 {
   return __builtin_aarch64_sqdmlsl_lanehi (__a, __b, __c, __d);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
-vqdmlsls_s32 (int64_t __a, int32x1_t __b, int32x1_t __c)
+vqdmlsls_s32 (int64_t __a, int32_t __b, int32_t __c)
 {
   return __builtin_aarch64_sqdmlslsi (__a, __b, __c);
 }
 
 __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
-vqdmlsls_lane_s32 (int64x1_t __a, int32x1_t __b, int32x2_t __c, const int __d)
+vqdmlsls_lane_s32 (int64x1_t __a, int32_t __b, int32x2_t __c, const int __d)
 {
   return (int64x1_t) {__builtin_aarch64_sqdmlsl_lanesi (__a[0], __b, __c, __d)};
 }
@@ -19556,26 +19550,26 @@  vqdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
   return __builtin_aarch64_sqdmulh_lanev4si (__a, __b, __c);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqdmulhh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqdmulhh_s16 (int16_t __a, int16_t __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqdmulhhi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqdmulhhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqdmulhh_lane_s16 (int16x1_t __a, int16x4_t __b, const int __c)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqdmulhh_lane_s16 (int16_t __a, int16x4_t __b, const int __c)
 {
   return __builtin_aarch64_sqdmulh_lanehi (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmulhs_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmulhs_s32 (int32_t __a, int32_t __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqdmulhsi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqdmulhsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmulhs_lane_s32 (int32x1_t __a, int32x2_t __b, const int __c)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmulhs_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
 {
   return __builtin_aarch64_sqdmulh_lanesi (__a, __b, __c);
 }
@@ -19678,26 +19672,26 @@  vqdmull_n_s32 (int32x2_t __a, int32_t __b)
   return __builtin_aarch64_sqdmull_nv2si (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmullh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmullh_s16 (int16_t __a, int16_t __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqdmullhi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqdmullhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqdmullh_lane_s16 (int16x1_t __a, int16x4_t __b, const int __c)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqdmullh_lane_s16 (int16_t __a, int16x4_t __b, const int __c)
 {
   return __builtin_aarch64_sqdmull_lanehi (__a, __b, __c);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
-vqdmulls_s32 (int32x1_t __a, int32x1_t __b)
+vqdmulls_s32 (int32_t __a, int32_t __b)
 {
   return __builtin_aarch64_sqdmullsi (__a, __b);
 }
 
 __extension__ static __inline int64x1_t __attribute__ ((__always_inline__))
-vqdmulls_lane_s32 (int32x1_t __a, int32x2_t __b, const int __c)
+vqdmulls_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
 {
   return (int64x1_t) {__builtin_aarch64_sqdmull_lanesi (__a, __b, __c)};
 }
@@ -19740,40 +19734,40 @@  vqmovn_u64 (uint64x2_t __a)
   return (uint32x2_t) __builtin_aarch64_uqmovnv2di ((int64x2_t) __a);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqmovnh_s16 (int16x1_t __a)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqmovnh_s16 (int16_t __a)
 {
-  return (int8x1_t) __builtin_aarch64_sqmovnhi (__a);
+  return (int8_t) __builtin_aarch64_sqmovnhi (__a);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqmovns_s32 (int32x1_t __a)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqmovns_s32 (int32_t __a)
 {
-  return (int16x1_t) __builtin_aarch64_sqmovnsi (__a);
+  return (int16_t) __builtin_aarch64_sqmovnsi (__a);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqmovnd_s64 (int64_t __a)
 {
-  return (int32x1_t) __builtin_aarch64_sqmovndi (__a);
+  return (int32_t) __builtin_aarch64_sqmovndi (__a);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqmovnh_u16 (uint16x1_t __a)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqmovnh_u16 (uint16_t __a)
 {
-  return (uint8x1_t) __builtin_aarch64_uqmovnhi (__a);
+  return (uint8_t) __builtin_aarch64_uqmovnhi (__a);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqmovns_u32 (uint32x1_t __a)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqmovns_u32 (uint32_t __a)
 {
-  return (uint16x1_t) __builtin_aarch64_uqmovnsi (__a);
+  return (uint16_t) __builtin_aarch64_uqmovnsi (__a);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
 vqmovnd_u64 (uint64_t __a)
 {
-  return (uint32x1_t) __builtin_aarch64_uqmovndi (__a);
+  return (uint32_t) __builtin_aarch64_uqmovndi (__a);
 }
 
 /* vqmovun */
@@ -19796,22 +19790,22 @@  vqmovun_s64 (int64x2_t __a)
   return (uint32x2_t) __builtin_aarch64_sqmovunv2di (__a);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqmovunh_s16 (int16x1_t __a)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqmovunh_s16 (int16_t __a)
 {
-  return (int8x1_t) __builtin_aarch64_sqmovunhi (__a);
+  return (int8_t) __builtin_aarch64_sqmovunhi (__a);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqmovuns_s32 (int32x1_t __a)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqmovuns_s32 (int32_t __a)
 {
-  return (int16x1_t) __builtin_aarch64_sqmovunsi (__a);
+  return (int16_t) __builtin_aarch64_sqmovunsi (__a);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqmovund_s64 (int64_t __a)
 {
-  return (int32x1_t) __builtin_aarch64_sqmovundi (__a);
+  return (int32_t) __builtin_aarch64_sqmovundi (__a);
 }
 
 /* vqneg */
@@ -19822,22 +19816,22 @@  vqnegq_s64 (int64x2_t __a)
   return (int64x2_t) __builtin_aarch64_sqnegv2di (__a);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqnegb_s8 (int8x1_t __a)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqnegb_s8 (int8_t __a)
 {
-  return (int8x1_t) __builtin_aarch64_sqnegqi (__a);
+  return (int8_t) __builtin_aarch64_sqnegqi (__a);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqnegh_s16 (int16x1_t __a)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqnegh_s16 (int16_t __a)
 {
-  return (int16x1_t) __builtin_aarch64_sqneghi (__a);
+  return (int16_t) __builtin_aarch64_sqneghi (__a);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqnegs_s32 (int32x1_t __a)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqnegs_s32 (int32_t __a)
 {
-  return (int32x1_t) __builtin_aarch64_sqnegsi (__a);
+  return (int32_t) __builtin_aarch64_sqnegsi (__a);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -19872,26 +19866,26 @@  vqrdmulhq_lane_s32 (int32x4_t __a, int32x2_t __b, const int __c)
   return __builtin_aarch64_sqrdmulh_lanev4si (__a, __b, __c);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqrdmulhh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqrdmulhh_s16 (int16_t __a, int16_t __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqrdmulhhi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqrdmulhhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqrdmulhh_lane_s16 (int16x1_t __a, int16x4_t __b, const int __c)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqrdmulhh_lane_s16 (int16_t __a, int16x4_t __b, const int __c)
 {
   return __builtin_aarch64_sqrdmulh_lanehi (__a, __b, __c);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqrdmulhs_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqrdmulhs_s32 (int32_t __a, int32_t __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqrdmulhsi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqrdmulhsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqrdmulhs_lane_s32 (int32x1_t __a, int32x2_t __b, const int __c)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqrdmulhs_lane_s32 (int32_t __a, int32x2_t __b, const int __c)
 {
   return __builtin_aarch64_sqrdmulh_lanesi (__a, __b, __c);
 }
@@ -19994,20 +19988,20 @@  vqrshlq_u64 (uint64x2_t __a, int64x2_t __b)
   return __builtin_aarch64_uqrshlv2di_uus ( __a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqrshlb_s8 (int8x1_t __a, int8x1_t __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqrshlb_s8 (int8_t __a, int8_t __b)
 {
   return __builtin_aarch64_sqrshlqi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqrshlh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqrshlh_s16 (int16_t __a, int16_t __b)
 {
   return __builtin_aarch64_sqrshlhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqrshls_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqrshls_s32 (int32_t __a, int32_t __b)
 {
   return __builtin_aarch64_sqrshlsi (__a, __b);
 }
@@ -20018,20 +20012,20 @@  vqrshld_s64 (int64_t __a, int64_t __b)
   return __builtin_aarch64_sqrshldi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqrshlb_u8 (uint8x1_t __a, uint8x1_t __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqrshlb_u8 (uint8_t __a, uint8_t __b)
 {
   return __builtin_aarch64_uqrshlqi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqrshlh_u16 (uint16x1_t __a, uint16x1_t __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqrshlh_u16 (uint16_t __a, uint16_t __b)
 {
   return __builtin_aarch64_uqrshlhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vqrshls_u32 (uint32x1_t __a, uint32x1_t __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vqrshls_u32 (uint32_t __a, uint32_t __b)
 {
   return __builtin_aarch64_uqrshlsi_uus (__a, __b);
 }
@@ -20080,37 +20074,37 @@  vqrshrn_n_u64 (uint64x2_t __a, const int __b)
   return __builtin_aarch64_uqrshrn_nv2di_uus ( __a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqrshrnh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqrshrnh_n_s16 (int16_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqrshrn_nhi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqrshrn_nhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqrshrns_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqrshrns_n_s32 (int32_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqrshrn_nsi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqrshrn_nsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqrshrnd_n_s64 (int64_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqrshrn_ndi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqrshrn_ndi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqrshrnh_n_u16 (uint16x1_t __a, const int __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqrshrnh_n_u16 (uint16_t __a, const int __b)
 {
   return __builtin_aarch64_uqrshrn_nhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqrshrns_n_u32 (uint32x1_t __a, const int __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqrshrns_n_u32 (uint32_t __a, const int __b)
 {
   return __builtin_aarch64_uqrshrn_nsi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
 vqrshrnd_n_u64 (uint64_t __a, const int __b)
 {
   return __builtin_aarch64_uqrshrn_ndi_uus (__a, __b);
@@ -20136,22 +20130,22 @@  vqrshrun_n_s64 (int64x2_t __a, const int __b)
   return (uint32x2_t) __builtin_aarch64_sqrshrun_nv2di (__a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqrshrunh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqrshrunh_n_s16 (int16_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqrshrun_nhi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqrshrun_nhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqrshruns_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqrshruns_n_s32 (int32_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqrshrun_nsi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqrshrun_nsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqrshrund_n_s64 (int64_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqrshrun_ndi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqrshrun_ndi (__a, __b);
 }
 
 /* vqshl */
@@ -20252,20 +20246,20 @@  vqshlq_u64 (uint64x2_t __a, int64x2_t __b)
   return __builtin_aarch64_uqshlv2di_uus ( __a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqshlb_s8 (int8x1_t __a, int8x1_t __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqshlb_s8 (int8_t __a, int8_t __b)
 {
   return __builtin_aarch64_sqshlqi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqshlh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqshlh_s16 (int16_t __a, int16_t __b)
 {
   return __builtin_aarch64_sqshlhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqshls_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqshls_s32 (int32_t __a, int32_t __b)
 {
   return __builtin_aarch64_sqshlsi (__a, __b);
 }
@@ -20276,20 +20270,20 @@  vqshld_s64 (int64_t __a, int64_t __b)
   return __builtin_aarch64_sqshldi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqshlb_u8 (uint8x1_t __a, uint8x1_t __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqshlb_u8 (uint8_t __a, uint8_t __b)
 {
   return __builtin_aarch64_uqshlqi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqshlh_u16 (uint16x1_t __a, uint16x1_t __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqshlh_u16 (uint16_t __a, uint16_t __b)
 {
   return __builtin_aarch64_uqshlhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vqshls_u32 (uint32x1_t __a, uint32x1_t __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vqshls_u32 (uint32_t __a, uint32_t __b)
 {
   return __builtin_aarch64_uqshlsi_uus (__a, __b);
 }
@@ -20396,22 +20390,22 @@  vqshlq_n_u64 (uint64x2_t __a, const int __b)
   return __builtin_aarch64_uqshl_nv2di_uus (__a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqshlb_n_s8 (int8x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqshlb_n_s8 (int8_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqshl_nqi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqshl_nqi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqshlh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqshlh_n_s16 (int16_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqshl_nhi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqshl_nhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqshls_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqshls_n_s32 (int32_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqshl_nsi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqshl_nsi (__a, __b);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -20420,20 +20414,20 @@  vqshld_n_s64 (int64_t __a, const int __b)
   return __builtin_aarch64_sqshl_ndi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqshlb_n_u8 (uint8x1_t __a, const int __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqshlb_n_u8 (uint8_t __a, const int __b)
 {
   return __builtin_aarch64_uqshl_nqi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqshlh_n_u16 (uint16x1_t __a, const int __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqshlh_n_u16 (uint16_t __a, const int __b)
 {
   return __builtin_aarch64_uqshl_nhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vqshls_n_u32 (uint32x1_t __a, const int __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vqshls_n_u32 (uint32_t __a, const int __b)
 {
   return __builtin_aarch64_uqshl_nsi_uus (__a, __b);
 }
@@ -20494,22 +20488,22 @@  vqshluq_n_s64 (int64x2_t __a, const int __b)
   return __builtin_aarch64_sqshlu_nv2di_uss (__a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqshlub_n_s8 (int8x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqshlub_n_s8 (int8_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqshlu_nqi_uss (__a, __b);
+  return (int8_t) __builtin_aarch64_sqshlu_nqi_uss (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqshluh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqshluh_n_s16 (int16_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqshlu_nhi_uss (__a, __b);
+  return (int16_t) __builtin_aarch64_sqshlu_nhi_uss (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqshlus_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqshlus_n_s32 (int32_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqshlu_nsi_uss (__a, __b);
+  return (int32_t) __builtin_aarch64_sqshlu_nsi_uss (__a, __b);
 }
 
 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
@@ -20556,37 +20550,37 @@  vqshrn_n_u64 (uint64x2_t __a, const int __b)
   return __builtin_aarch64_uqshrn_nv2di_uus ( __a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqshrnh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqshrnh_n_s16 (int16_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqshrn_nhi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqshrn_nhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqshrns_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqshrns_n_s32 (int32_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqshrn_nsi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqshrn_nsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqshrnd_n_s64 (int64_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqshrn_ndi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqshrn_ndi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqshrnh_n_u16 (uint16x1_t __a, const int __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqshrnh_n_u16 (uint16_t __a, const int __b)
 {
   return __builtin_aarch64_uqshrn_nhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqshrns_n_u32 (uint32x1_t __a, const int __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqshrns_n_u32 (uint32_t __a, const int __b)
 {
   return __builtin_aarch64_uqshrn_nsi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
 vqshrnd_n_u64 (uint64_t __a, const int __b)
 {
   return __builtin_aarch64_uqshrn_ndi_uus (__a, __b);
@@ -20612,42 +20606,42 @@  vqshrun_n_s64 (int64x2_t __a, const int __b)
   return (uint32x2_t) __builtin_aarch64_sqshrun_nv2di (__a, __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqshrunh_n_s16 (int16x1_t __a, const int __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqshrunh_n_s16 (int16_t __a, const int __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqshrun_nhi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqshrun_nhi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqshruns_n_s32 (int32x1_t __a, const int __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqshruns_n_s32 (int32_t __a, const int __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqshrun_nsi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqshrun_nsi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
 vqshrund_n_s64 (int64_t __a, const int __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqshrun_ndi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqshrun_ndi (__a, __b);
 }
 
 /* vqsub */
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vqsubb_s8 (int8x1_t __a, int8x1_t __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vqsubb_s8 (int8_t __a, int8_t __b)
 {
-  return (int8x1_t) __builtin_aarch64_sqsubqi (__a, __b);
+  return (int8_t) __builtin_aarch64_sqsubqi (__a, __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vqsubh_s16 (int16x1_t __a, int16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vqsubh_s16 (int16_t __a, int16_t __b)
 {
-  return (int16x1_t) __builtin_aarch64_sqsubhi (__a, __b);
+  return (int16_t) __builtin_aarch64_sqsubhi (__a, __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vqsubs_s32 (int32x1_t __a, int32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vqsubs_s32 (int32_t __a, int32_t __b)
 {
-  return (int32x1_t) __builtin_aarch64_sqsubsi (__a, __b);
+  return (int32_t) __builtin_aarch64_sqsubsi (__a, __b);
 }
 
 __extension__ static __inline int64_t __attribute__ ((__always_inline__))
@@ -20656,22 +20650,22 @@  vqsubd_s64 (int64_t __a, int64_t __b)
   return __builtin_aarch64_sqsubdi (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vqsubb_u8 (uint8x1_t __a, uint8x1_t __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vqsubb_u8 (uint8_t __a, uint8_t __b)
 {
-  return (uint8x1_t) __builtin_aarch64_uqsubqi_uuu (__a, __b);
+  return (uint8_t) __builtin_aarch64_uqsubqi_uuu (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vqsubh_u16 (uint16x1_t __a, uint16x1_t __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vqsubh_u16 (uint16_t __a, uint16_t __b)
 {
-  return (uint16x1_t) __builtin_aarch64_uqsubhi_uuu (__a, __b);
+  return (uint16_t) __builtin_aarch64_uqsubhi_uuu (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vqsubs_u32 (uint32x1_t __a, uint32x1_t __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vqsubs_u32 (uint32_t __a, uint32_t __b)
 {
-  return (uint32x1_t) __builtin_aarch64_uqsubsi_uuu (__a, __b);
+  return (uint32_t) __builtin_aarch64_uqsubsi_uuu (__a, __b);
 }
 
 __extension__ static __inline uint64_t __attribute__ ((__always_inline__))
@@ -22135,20 +22129,20 @@  vsqaddq_u64 (uint64x2_t __a, int64x2_t __b)
   return __builtin_aarch64_usqaddv2di_uus (__a, __b);
 }
 
-__extension__ static __inline uint8x1_t __attribute__ ((__always_inline__))
-vsqaddb_u8 (uint8x1_t __a, int8x1_t __b)
+__extension__ static __inline uint8_t __attribute__ ((__always_inline__))
+vsqaddb_u8 (uint8_t __a, int8_t __b)
 {
   return __builtin_aarch64_usqaddqi_uus (__a, __b);
 }
 
-__extension__ static __inline uint16x1_t __attribute__ ((__always_inline__))
-vsqaddh_u16 (uint16x1_t __a, int16x1_t __b)
+__extension__ static __inline uint16_t __attribute__ ((__always_inline__))
+vsqaddh_u16 (uint16_t __a, int16_t __b)
 {
   return __builtin_aarch64_usqaddhi_uus (__a, __b);
 }
 
-__extension__ static __inline uint32x1_t __attribute__ ((__always_inline__))
-vsqadds_u32 (uint32x1_t __a, int32x1_t __b)
+__extension__ static __inline uint32_t __attribute__ ((__always_inline__))
+vsqadds_u32 (uint32_t __a, int32_t __b)
 {
   return __builtin_aarch64_usqaddsi_uus (__a, __b);
 }
@@ -24206,20 +24200,20 @@  vuqaddq_s64 (int64x2_t __a, uint64x2_t __b)
   return __builtin_aarch64_suqaddv2di_ssu (__a,  __b);
 }
 
-__extension__ static __inline int8x1_t __attribute__ ((__always_inline__))
-vuqaddb_s8 (int8x1_t __a, uint8x1_t __b)
+__extension__ static __inline int8_t __attribute__ ((__always_inline__))
+vuqaddb_s8 (int8_t __a, uint8_t __b)
 {
   return __builtin_aarch64_suqaddqi_ssu (__a,  __b);
 }
 
-__extension__ static __inline int16x1_t __attribute__ ((__always_inline__))
-vuqaddh_s16 (int16x1_t __a, uint16x1_t __b)
+__extension__ static __inline int16_t __attribute__ ((__always_inline__))
+vuqaddh_s16 (int16_t __a, uint16_t __b)
 {
   return __builtin_aarch64_suqaddhi_ssu (__a,  __b);
 }
 
-__extension__ static __inline int32x1_t __attribute__ ((__always_inline__))
-vuqadds_s32 (int32x1_t __a, uint32x1_t __b)
+__extension__ static __inline int32_t __attribute__ ((__always_inline__))
+vuqadds_s32 (int32_t __a, uint32_t __b)
 {
   return __builtin_aarch64_suqaddsi_ssu (__a,  __b);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
index 624348eb449a7f197800f29a8229250f23e71379..6964b0c8845d7cd3ef39d594e26edc18ec66bb76 100644
--- a/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
+++ b/gcc/testsuite/gcc.target/aarch64/scalar_intrinsics.c
@@ -187,20 +187,20 @@  test_vcltzd_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "aarch64_get_lanev16qi" 2 } } */
 
-int8x1_t
+int8_t
 test_vdupb_lane_s8 (int8x16_t a)
 {
-  int8x1_t res;
+  int8_t res;
   force_simd (a);
   res = vdupb_laneq_s8 (a, 2);
   force_simd (res);
   return res;
 }
 
-uint8x1_t
+uint8_t
 test_vdupb_lane_u8 (uint8x16_t a)
 {
-  uint8x1_t res;
+  uint8_t res;
   force_simd (a);
   res = vdupb_laneq_u8 (a, 2);
   force_simd (res);
@@ -209,20 +209,20 @@  test_vdupb_lane_u8 (uint8x16_t a)
 
 /* { dg-final { scan-assembler-times "aarch64_get_lanev8hi" 2 } } */
 
-int16x1_t
+int16_t
 test_vduph_lane_s16 (int16x8_t a)
 {
-  int16x1_t res;
+  int16_t res;
   force_simd (a);
   res = vduph_laneq_s16 (a, 2);
   force_simd (res);
   return res;
 }
 
-uint16x1_t
+uint16_t
 test_vduph_lane_u16 (uint16x8_t a)
 {
-  uint16x1_t res;
+  uint16_t res;
   force_simd (a);
   res = vduph_laneq_u16 (a, 2);
   force_simd (res);
@@ -231,20 +231,20 @@  test_vduph_lane_u16 (uint16x8_t a)
 
 /* { dg-final { scan-assembler-times "aarch64_get_lanev4si" 2 } } */
 
-int32x1_t
+int32_t
 test_vdups_lane_s32 (int32x4_t a)
 {
-  int32x1_t res;
+  int32_t res;
   force_simd (a);
   res = vdups_laneq_s32 (a, 2);
   force_simd (res);
   return res;
 }
 
-uint32x1_t
+uint32_t
 test_vdups_lane_u32 (uint32x4_t a)
 {
-  uint32x1_t res;
+  uint32_t res;
   force_simd (a);
   res = vdups_laneq_u32 (a, 2);
   force_simd (res);
@@ -310,24 +310,24 @@  test_vqaddd_u64 (uint64_t a, uint64_t b)
 
 /* { dg-final { scan-assembler-times "\\tuqadd\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
-test_vqadds_u32 (uint32x1_t a, uint32x1_t b)
+uint32_t
+test_vqadds_u32 (uint32_t a, uint32_t b)
 {
   return vqadds_u32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqadd\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqaddh_u16 (uint16x1_t a, uint16x1_t b)
+uint16_t
+test_vqaddh_u16 (uint16_t a, uint16_t b)
 {
   return vqaddh_u16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqadd\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqaddb_u8 (uint8x1_t a, uint8x1_t b)
+uint8_t
+test_vqaddb_u8 (uint8_t a, uint8_t b)
 {
   return vqaddb_u8 (a, b);
 }
@@ -342,40 +342,40 @@  test_vqaddd_s64 (int64_t a, int64_t b)
 
 /* { dg-final { scan-assembler-times "\\tsqadd\\ts\[0-9\]+, s\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqadds_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqadds_s32 (int32_t a, int32_t b)
 {
   return vqadds_s32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqadd\\th\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqaddh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqaddh_s16 (int16_t a, int16_t b)
 {
   return vqaddh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqadd\\tb\[0-9\]+, b\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqaddb_s8 (int8x1_t a, int8x1_t b)
+int8_t
+test_vqaddb_s8 (int8_t a, int8_t b)
 {
   return vqaddb_s8 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqdmlalh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
+int32_t
+test_vqdmlalh_s16 (int32_t a, int16_t b, int16_t c)
 {
   return vqdmlalh_s16 (a, b, c);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmlal\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 
-int32x1_t
-test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
+int32_t
+test_vqdmlalh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
 {
   return vqdmlalh_lane_s16 (a, b, c, 3);
 }
@@ -383,7 +383,7 @@  test_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 
 int64_t
-test_vqdmlals_s32 (int64_t a, int32x1_t b, int32x1_t c)
+test_vqdmlals_s32 (int64_t a, int32_t b, int32_t c)
 {
   return vqdmlals_s32 (a, b, c);
 }
@@ -391,23 +391,23 @@  test_vqdmlals_s32 (int64_t a, int32x1_t b, int32x1_t c)
 /* { dg-final { scan-assembler-times "\\tsqdmlal\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
 int64x1_t
-test_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+test_vqdmlals_lane_s32 (int64x1_t a, int32_t b, int32x2_t c)
 {
   return vqdmlals_lane_s32 (a, b, c, 1);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqdmlslh_s16 (int32x1_t a, int16x1_t b, int16x1_t c)
+int32_t
+test_vqdmlslh_s16 (int32_t a, int16_t b, int16_t c)
 {
   return vqdmlslh_s16 (a, b, c);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 
-int32x1_t
-test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
+int32_t
+test_vqdmlslh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
 {
   return vqdmlslh_lane_s16 (a, b, c, 3);
 }
@@ -415,7 +415,7 @@  test_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 
 int64_t
-test_vqdmlsls_s32 (int64_t a, int32x1_t b, int32x1_t c)
+test_vqdmlsls_s32 (int64_t a, int32_t b, int32_t c)
 {
   return vqdmlsls_s32 (a, b, c);
 }
@@ -423,55 +423,55 @@  test_vqdmlsls_s32 (int64_t a, int32x1_t b, int32x1_t c)
 /* { dg-final { scan-assembler-times "\\tsqdmlsl\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
 int64x1_t
-test_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+test_vqdmlsls_lane_s32 (int64x1_t a, int32_t b, int32x2_t c)
 {
   return vqdmlsls_lane_s32 (a, b, c, 1);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqdmulhh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqdmulhh_s16 (int16_t a, int16_t b)
 {
   return vqdmulhh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 
-int16x1_t
-test_vqdmulhh_lane_s16 (int16x1_t a, int16x4_t b)
+int16_t
+test_vqdmulhh_lane_s16 (int16_t a, int16x4_t b)
 {
   return vqdmulhh_lane_s16 (a, b, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqdmulhs_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqdmulhs_s32 (int32_t a, int32_t b)
 {
   return vqdmulhs_s32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
-int32x1_t
-test_vqdmulhs_lane_s32 (int32x1_t a, int32x2_t b)
+int32_t
+test_vqdmulhs_lane_s32 (int32_t a, int32x2_t b)
 {
   return vqdmulhs_lane_s32 (a, b, 1);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqdmullh_s16 (int16x1_t a, int16x1_t b)
+int32_t
+test_vqdmullh_s16 (int16_t a, int16_t b)
 {
   return vqdmullh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqdmull\\ts\[0-9\]+, h\[0-9\]+, v" 1 } } */
 
-int32x1_t
-test_vqdmullh_lane_s16 (int16x1_t a, int16x4_t b)
+int32_t
+test_vqdmullh_lane_s16 (int16_t a, int16x4_t b)
 {
   return vqdmullh_lane_s16 (a, b, 3);
 }
@@ -479,7 +479,7 @@  test_vqdmullh_lane_s16 (int16x1_t a, int16x4_t b)
 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 
 int64_t
-test_vqdmulls_s32 (int32x1_t a, int32x1_t b)
+test_vqdmulls_s32 (int32_t a, int32_t b)
 {
   return vqdmulls_s32 (a, b);
 }
@@ -487,63 +487,63 @@  test_vqdmulls_s32 (int32x1_t a, int32x1_t b)
 /* { dg-final { scan-assembler-times "\\tsqdmull\\td\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
 int64x1_t
-test_vqdmulls_lane_s32 (int32x1_t a, int32x2_t b)
+test_vqdmulls_lane_s32 (int32_t a, int32x2_t b)
 {
   return vqdmulls_lane_s32 (a, b, 1);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, h\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqrdmulhh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqrdmulhh_s16 (int16_t a, int16_t b)
 {
   return vqrdmulhh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\th\[0-9\]+, h\[0-9\]+, v" 1 } } */
 
-int16x1_t
-test_vqrdmulhh_lane_s16 (int16x1_t a, int16x4_t b)
+int16_t
+test_vqrdmulhh_lane_s16 (int16_t a, int16x4_t b)
 {
   return vqrdmulhh_lane_s16 (a, b, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, s\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqrdmulhs_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqrdmulhs_s32 (int32_t a, int32_t b)
 {
   return vqrdmulhs_s32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrdmulh\\ts\[0-9\]+, s\[0-9\]+, v" 1 } } */
 
-int32x1_t
-test_vqrdmulhs_lane_s32 (int32x1_t a, int32x2_t b)
+int32_t
+test_vqrdmulhs_lane_s32 (int32_t a, int32x2_t b)
 {
   return vqrdmulhs_lane_s32 (a, b, 1);
 }
 
 /* { dg-final { scan-assembler-times "\\tsuqadd\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vuqaddb_s8 (int8x1_t a, int8x1_t b)
+int8_t
+test_vuqaddb_s8 (int8_t a, int8_t b)
 {
   return vuqaddb_s8 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsuqadd\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vuqaddh_s16 (int16x1_t a, int8x1_t b)
+int16_t
+test_vuqaddh_s16 (int16_t a, int8_t b)
 {
   return vuqaddh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsuqadd\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vuqadds_s32 (int32x1_t a, int8x1_t b)
+int32_t
+test_vuqadds_s32 (int32_t a, int8_t b)
 {
   return vuqadds_s32 (a, b);
 }
@@ -558,24 +558,24 @@  test_vuqaddd_s64 (int64_t a, uint64_t b)
 
 /* { dg-final { scan-assembler-times "\\tusqadd\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vsqaddb_u8 (uint8x1_t a, int8x1_t b)
+uint8_t
+test_vsqaddb_u8 (uint8_t a, int8_t b)
 {
   return vsqaddb_u8 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tusqadd\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vsqaddh_u16 (uint16x1_t a, int8x1_t b)
+uint16_t
+test_vsqaddh_u16 (uint16_t a, int8_t b)
 {
   return vsqaddh_u16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tusqadd\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
-test_vsqadds_u32 (uint32x1_t a, int8x1_t b)
+uint32_t
+test_vsqadds_u32 (uint32_t a, int8_t b)
 {
   return vsqadds_u32 (a, b);
 }
@@ -590,71 +590,71 @@  test_vsqaddd_u64 (uint64_t a, int64_t b)
 
 /* { dg-final { scan-assembler-times "\\tsqabs\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqabsb_s8 (int8x1_t a)
+int8_t
+test_vqabsb_s8 (int8_t a)
 {
   return vqabsb_s8 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqabs\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqabsh_s16 (int16x1_t a)
+int16_t
+test_vqabsh_s16 (int16_t a)
 {
   return vqabsh_s16 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqabs\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqabss_s32 (int32x1_t a)
+int32_t
+test_vqabss_s32 (int32_t a)
 {
   return vqabss_s32 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqneg\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqnegb_s8 (int8x1_t a)
+int8_t
+test_vqnegb_s8 (int8_t a)
 {
   return vqnegb_s8 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqneg\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqnegh_s16 (int16x1_t a)
+int16_t
+test_vqnegh_s16 (int16_t a)
 {
   return vqnegh_s16 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqneg\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqnegs_s32 (int32x1_t a)
+int32_t
+test_vqnegs_s32 (int32_t a)
 {
   return vqnegs_s32 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqmovunh_s16 (int16x1_t a)
+int8_t
+test_vqmovunh_s16 (int16_t a)
 {
   return vqmovunh_s16 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqmovuns_s32 (int32x1_t a)
+int16_t
+test_vqmovuns_s32 (int32_t a)
 {
   return vqmovuns_s32 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqxtun\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqmovund_s64 (int64_t a)
 {
   return vqmovund_s64 (a);
@@ -662,23 +662,23 @@  test_vqmovund_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqxtn\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqmovnh_s16 (int16x1_t a)
+int8_t
+test_vqmovnh_s16 (int16_t a)
 {
   return vqmovnh_s16 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqxtn\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqmovns_s32 (int32x1_t a)
+int16_t
+test_vqmovns_s32 (int32_t a)
 {
   return vqmovns_s32 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqxtn\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqmovnd_s64 (int64_t a)
 {
   return vqmovnd_s64 (a);
@@ -686,23 +686,23 @@  test_vqmovnd_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tuqxtn\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqmovnh_u16 (uint16x1_t a)
+uint8_t
+test_vqmovnh_u16 (uint16_t a)
 {
   return vqmovnh_u16 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqxtn\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqmovns_u32 (uint32x1_t a)
+uint16_t
+test_vqmovns_u32 (uint32_t a)
 {
   return vqmovns_u32 (a);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqxtn\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
+uint32_t
 test_vqmovnd_u64 (uint64_t a)
 {
   return vqmovnd_u64 (a);
@@ -745,24 +745,24 @@  test_vqsubd_u64 (uint64_t a, uint64_t b)
 
 /* { dg-final { scan-assembler-times "\\tuqsub\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
-test_vqsubs_u32 (uint32x1_t a, uint32x1_t b)
+uint32_t
+test_vqsubs_u32 (uint32_t a, uint32_t b)
 {
   return vqsubs_u32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqsub\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqsubh_u16 (uint16x1_t a, uint16x1_t b)
+uint16_t
+test_vqsubh_u16 (uint16_t a, uint16_t b)
 {
   return vqsubh_u16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqsub\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqsubb_u8 (uint8x1_t a, uint8x1_t b)
+uint8_t
+test_vqsubb_u8 (uint8_t a, uint8_t b)
 {
   return vqsubb_u8 (a, b);
 }
@@ -777,24 +777,24 @@  test_vqsubd_s64 (int64_t a, int64_t b)
 
 /* { dg-final { scan-assembler-times "\\tsqsub\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqsubs_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqsubs_s32 (int32_t a, int32_t b)
 {
   return vqsubs_s32 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqsub\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqsubh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqsubh_s16 (int16_t a, int16_t b)
 {
   return vqsubh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqsub\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqsubb_s8 (int8x1_t a, int8x1_t b)
+int8_t
+test_vqsubb_s8 (int8_t a, int8_t b)
 {
   return vqsubb_s8 (a, b);
 }
@@ -900,24 +900,24 @@  test_vrsrad_n_u64 (uint64_t a, uint64_t b)
 
 /* { dg-final { scan-assembler-times "\\tsqrshl\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqrshlb_s8 (int8x1_t a, int8x1_t b)
+int8_t
+test_vqrshlb_s8 (int8_t a, int8_t b)
 {
   return vqrshlb_s8 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshl\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqrshlh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqrshlh_s16 (int16_t a, int16_t b)
 {
   return vqrshlh_s16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshl\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqrshls_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqrshls_s32 (int32_t a, int32_t b)
 {
   return vqrshls_s32 (a, b);
 }
@@ -932,24 +932,24 @@  test_vqrshld_s64 (int64_t a, int64_t b)
 
 /* { dg-final { scan-assembler-times "\\tuqrshl\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqrshlb_u8 (uint8x1_t a, uint8x1_t b)
+uint8_t
+test_vqrshlb_u8 (uint8_t a, uint8_t b)
 {
   return vqrshlb_u8 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqrshl\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqrshlh_u16 (uint16x1_t a, uint16x1_t b)
+uint16_t
+test_vqrshlh_u16 (uint16_t a, uint16_t b)
 {
   return vqrshlh_u16 (a, b);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqrshl\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
-test_vqrshls_u32 (uint32x1_t a, uint32x1_t b)
+uint32_t
+test_vqrshls_u32 (uint32_t a, uint32_t b)
 {
   return vqrshls_u32 (a, b);
 }
@@ -964,24 +964,24 @@  test_vqrshld_u64 (uint64_t a, uint64_t b)
 
 /* { dg-final { scan-assembler-times "\\tsqshlu\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqshlub_n_s8 (int8x1_t a)
+int8_t
+test_vqshlub_n_s8 (int8_t a)
 {
   return vqshlub_n_s8 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshlu\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqshluh_n_s16 (int16x1_t a)
+int16_t
+test_vqshluh_n_s16 (int16_t a)
 {
   return vqshluh_n_s16 (a, 4);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshlu\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
-test_vqshlus_n_s32 (int32x1_t a)
+int32_t
+test_vqshlus_n_s32 (int32_t a)
 {
   return vqshlus_n_s32 (a, 5);
 }
@@ -996,42 +996,42 @@  test_vqshlud_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqshl\\tb\[0-9\]+" 2 } } */
 
-int8x1_t
-test_vqshlb_s8 (int8x1_t a, int8x1_t b)
+int8_t
+test_vqshlb_s8 (int8_t a, int8_t b)
 {
   return vqshlb_s8 (a, b);
 }
 
-int8x1_t
-test_vqshlb_n_s8 (int8x1_t a)
+int8_t
+test_vqshlb_n_s8 (int8_t a)
 {
   return vqshlb_n_s8 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshl\\th\[0-9\]+" 2 } } */
 
-int16x1_t
-test_vqshlh_s16 (int16x1_t a, int16x1_t b)
+int16_t
+test_vqshlh_s16 (int16_t a, int16_t b)
 {
   return vqshlh_s16 (a, b);
 }
 
-int16x1_t
-test_vqshlh_n_s16 (int16x1_t a)
+int16_t
+test_vqshlh_n_s16 (int16_t a)
 {
   return vqshlh_n_s16 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshl\\ts\[0-9\]+" 2 } } */
 
-int32x1_t
-test_vqshls_s32 (int32x1_t a, int32x1_t b)
+int32_t
+test_vqshls_s32 (int32_t a, int32_t b)
 {
   return vqshls_s32 (a, b);
 }
 
-int32x1_t
-test_vqshls_n_s32 (int32x1_t a)
+int32_t
+test_vqshls_n_s32 (int32_t a)
 {
   return vqshls_n_s32 (a, 4);
 }
@@ -1052,42 +1052,42 @@  test_vqshld_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tuqshl\\tb\[0-9\]+" 2 } } */
 
-uint8x1_t
-test_vqshlb_u8 (uint8x1_t a, uint8x1_t b)
+uint8_t
+test_vqshlb_u8 (uint8_t a, uint8_t b)
 {
   return vqshlb_u8 (a, b);
 }
 
-uint8x1_t
-test_vqshlb_n_u8 (uint8x1_t a)
+uint8_t
+test_vqshlb_n_u8 (uint8_t a)
 {
   return vqshlb_n_u8 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqshl\\th\[0-9\]+" 2 } } */
 
-uint16x1_t
-test_vqshlh_u16 (uint16x1_t a, uint16x1_t b)
+uint16_t
+test_vqshlh_u16 (uint16_t a, uint16_t b)
 {
   return vqshlh_u16 (a, b);
 }
 
-uint16x1_t
-test_vqshlh_n_u16 (uint16x1_t a)
+uint16_t
+test_vqshlh_n_u16 (uint16_t a)
 {
   return vqshlh_n_u16 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqshl\\ts\[0-9\]+" 2 } } */
 
-uint32x1_t
-test_vqshls_u32 (uint32x1_t a, uint32x1_t b)
+uint32_t
+test_vqshls_u32 (uint32_t a, uint32_t b)
 {
   return vqshls_u32 (a, b);
 }
 
-uint32x1_t
-test_vqshls_n_u32 (uint32x1_t a)
+uint32_t
+test_vqshls_n_u32 (uint32_t a)
 {
   return vqshls_n_u32 (a, 4);
 }
@@ -1108,23 +1108,23 @@  test_vqshld_n_u64 (uint64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqshrun\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqshrunh_n_s16 (int16x1_t a)
+int8_t
+test_vqshrunh_n_s16 (int16_t a)
 {
   return vqshrunh_n_s16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshrun\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqshruns_n_s32 (int32x1_t a)
+int16_t
+test_vqshruns_n_s32 (int32_t a)
 {
   return vqshruns_n_s32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshrun\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqshrund_n_s64 (int64_t a)
 {
   return vqshrund_n_s64 (a, 4);
@@ -1132,23 +1132,23 @@  test_vqshrund_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqrshrun\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqrshrunh_n_s16 (int16x1_t a)
+int8_t
+test_vqrshrunh_n_s16 (int16_t a)
 {
   return vqrshrunh_n_s16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshrun\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqrshruns_n_s32 (int32x1_t a)
+int16_t
+test_vqrshruns_n_s32 (int32_t a)
 {
   return vqrshruns_n_s32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshrun\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqrshrund_n_s64 (int64_t a)
 {
   return vqrshrund_n_s64 (a, 4);
@@ -1156,23 +1156,23 @@  test_vqrshrund_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqshrn\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqshrnh_n_s16 (int16x1_t a)
+int8_t
+test_vqshrnh_n_s16 (int16_t a)
 {
   return vqshrnh_n_s16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshrn\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqshrns_n_s32 (int32x1_t a)
+int16_t
+test_vqshrns_n_s32 (int32_t a)
 {
   return vqshrns_n_s32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqshrn\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqshrnd_n_s64 (int64_t a)
 {
   return vqshrnd_n_s64 (a, 4);
@@ -1180,23 +1180,23 @@  test_vqshrnd_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tuqshrn\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqshrnh_n_u16 (uint16x1_t a)
+uint8_t
+test_vqshrnh_n_u16 (uint16_t a)
 {
   return vqshrnh_n_u16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqshrn\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqshrns_n_u32 (uint32x1_t a)
+uint16_t
+test_vqshrns_n_u32 (uint32_t a)
 {
   return vqshrns_n_u32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqshrn\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
+uint32_t
 test_vqshrnd_n_u64 (uint64_t a)
 {
   return vqshrnd_n_u64 (a, 4);
@@ -1204,23 +1204,23 @@  test_vqshrnd_n_u64 (uint64_t a)
 
 /* { dg-final { scan-assembler-times "\\tsqrshrn\\tb\[0-9\]+" 1 } } */
 
-int8x1_t
-test_vqrshrnh_n_s16 (int16x1_t a)
+int8_t
+test_vqrshrnh_n_s16 (int16_t a)
 {
   return vqrshrnh_n_s16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshrn\\th\[0-9\]+" 1 } } */
 
-int16x1_t
-test_vqrshrns_n_s32 (int32x1_t a)
+int16_t
+test_vqrshrns_n_s32 (int32_t a)
 {
   return vqrshrns_n_s32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tsqrshrn\\ts\[0-9\]+" 1 } } */
 
-int32x1_t
+int32_t
 test_vqrshrnd_n_s64 (int64_t a)
 {
   return vqrshrnd_n_s64 (a, 4);
@@ -1228,23 +1228,23 @@  test_vqrshrnd_n_s64 (int64_t a)
 
 /* { dg-final { scan-assembler-times "\\tuqrshrn\\tb\[0-9\]+" 1 } } */
 
-uint8x1_t
-test_vqrshrnh_n_u16 (uint16x1_t a)
+uint8_t
+test_vqrshrnh_n_u16 (uint16_t a)
 {
   return vqrshrnh_n_u16 (a, 2);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqrshrn\\th\[0-9\]+" 1 } } */
 
-uint16x1_t
-test_vqrshrns_n_u32 (uint32x1_t a)
+uint16_t
+test_vqrshrns_n_u32 (uint32_t a)
 {
   return vqrshrns_n_u32 (a, 3);
 }
 
 /* { dg-final { scan-assembler-times "\\tuqrshrn\\ts\[0-9\]+" 1 } } */
 
-uint32x1_t
+uint32_t
 test_vqrshrnd_n_u64 (uint64_t a)
 {
   return vqrshrnd_n_u64 (a, 4);
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c
index 83f5af5960ffc2a2994d04062452bf62ad6bf92c..9ca041cb813e26f5430aa696761e38d06ce2cc03 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlalh_lane_s16.c
@@ -5,8 +5,8 @@ 
 
 #include "arm_neon.h"
 
-int32x1_t
-t_vqdmlalh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
+int32_t
+t_vqdmlalh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
 {
   return vqdmlalh_lane_s16 (a, b, c, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
index ef94e95d97142ad450824d39c74bad15b555fe31..40e4c9ff4aa5aad5eb048b7630ddaf5e1d408a21 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlals_lane_s32.c
@@ -6,7 +6,7 @@ 
 #include "arm_neon.h"
 
 int64x1_t
-t_vqdmlals_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+t_vqdmlals_lane_s32 (int64x1_t a, int32_t b, int32x2_t c)
 {
   return vqdmlals_lane_s32 (a, b, c, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c
index 056dfbb11f01eef3d0b820735253059db86727f4..b3bbc951ceff7458984ee575bd7ddd897cdda69b 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlslh_lane_s16.c
@@ -5,8 +5,8 @@ 
 
 #include "arm_neon.h"
 
-int32x1_t
-t_vqdmlslh_lane_s16 (int32x1_t a, int16x1_t b, int16x4_t c)
+int32_t
+t_vqdmlslh_lane_s16 (int32_t a, int16_t b, int16x4_t c)
 {
   return vqdmlslh_lane_s16 (a, b, c, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
index 9e351bc360fd578475480e79078153d3fb69b058..5bd643a240d62a16992bd47ad578d719ee65f0cb 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmlsls_lane_s32.c
@@ -6,7 +6,7 @@ 
 #include "arm_neon.h"
 
 int64x1_t
-t_vqdmlsls_lane_s32 (int64x1_t a, int32x1_t b, int32x2_t c)
+t_vqdmlsls_lane_s32 (int64x1_t a, int32_t b, int32x2_t c)
 {
   return vqdmlsls_lane_s32 (a, b, c, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c
index fd271e0b3a804c61da32a03f085ee16cec118847..c3761dfd09001ab88ba1c3f4b59bb460ecef99a0 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmullh_lane_s16.c
@@ -5,8 +5,8 @@ 
 
 #include "arm_neon.h"
 
-int32x1_t
-t_vqdmullh_lane_s16 (int16x1_t a, int16x4_t b)
+int32_t
+t_vqdmullh_lane_s16 (int16_t a, int16x4_t b)
 {
   return vqdmullh_lane_s16 (a, b, 0);
 }
diff --git a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c
index 1103333753756a9600da432712bc6f7c4d06f069..6ed8e3a0b8a1f4c8a189eb45ab31956e1248d370 100644
--- a/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c
+++ b/gcc/testsuite/gcc.target/aarch64/simd/vqdmulls_lane_s32.c
@@ -6,7 +6,7 @@ 
 #include "arm_neon.h"
 
 int64x1_t
-t_vqdmulls_lane_s32 (int32x1_t a, int32x2_t b)
+t_vqdmulls_lane_s32 (int32_t a, int32x2_t b)
 {
   return vqdmulls_lane_s32 (a, b, 0);
 }