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[avr,committed] Fix build warnings caused by REG_CLASS_CONTENTS

Message ID 53734F36.10000@gjlay.de
State New
Headers show

Commit Message

Georg-Johann Lay May 14, 2014, 11:10 a.m. UTC
https://gcc.gnu.org/r210418

Applied this patch in order to fixed build warnings like these

gcc/reginfo.c:115:5: warning: narrowing conversion of ‘-1073741824’ from ‘int’ 
to ‘const unsigned int’ inside { } is ill-formed in C++11 [-Wnarrowing]
gcc/reginfo.c:115:5: warning: narrowing conversion of ‘-268435456’ from ‘int’ 
to ‘const unsigned int’ inside { } is ill-formed in C++11 [-Wnarrowing]
gcc/reginfo.c:115:5: warning: narrowing conversion of ‘-67108864’ from ‘int’ to 
‘const unsigned int’ inside { } is ill-formed in C++11 [-Wnarrowing]
gcc/reginfo.c:115:5: warning: narrowing conversion of ‘-16777216’ from ‘int’ to 
‘const unsigned int’ inside { } is ill-formed in C++11 [-Wnarrowing]
gcc/reginfo.c:115:5: warning: narrowing conversion of ‘-65536’ from ‘int’ to 
‘const unsigned int’ inside { } is ill-formed in C++11 [-Wnarrowing]

on I32 hosts that are caused by expressions like 3 << 30 in REG_CLASS_CONTENTS 
initializer.

Johann

	* config/avr/avr.h (REG_CLASS_CONTENTS): Use unsigned suffix for
	 shifted values to avoid build warning.
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Patch

Index: config/avr/avr.h
===================================================================
--- config/avr/avr.h	(revision 210276)
+++ config/avr/avr.h	(working copy)
@@ -251,18 +251,18 @@  enum reg_class {
 #define REG_CLASS_CONTENTS {						\
   {0x00000000,0x00000000},	/* NO_REGS */				\
   {0x00000001,0x00000000},	/* R0_REG */                            \
-  {3 << REG_X,0x00000000},      /* POINTER_X_REGS, r26 - r27 */		\
-  {3 << REG_Y,0x00000000},      /* POINTER_Y_REGS, r28 - r29 */		\
-  {3 << REG_Z,0x00000000},      /* POINTER_Z_REGS, r30 - r31 */		\
+  {3u << REG_X,0x00000000},     /* POINTER_X_REGS, r26 - r27 */		\
+  {3u << REG_Y,0x00000000},     /* POINTER_Y_REGS, r28 - r29 */		\
+  {3u << REG_Z,0x00000000},     /* POINTER_Z_REGS, r30 - r31 */		\
   {0x00000000,0x00000003},	/* STACK_REG, STACK */			\
-  {(3 << REG_Y) | (3 << REG_Z),						\
+  {(3u << REG_Y) | (3u << REG_Z),					\
      0x00000000},		/* BASE_POINTER_REGS, r28 - r31 */	\
-  {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z),				\
+  {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z),			\
      0x00000000},		/* POINTER_REGS, r26 - r31 */		\
-  {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W),		\
+  {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W),	\
      0x00000000},		/* ADDW_REGS, r24 - r31 */		\
   {0x00ff0000,0x00000000},	/* SIMPLE_LD_REGS r16 - r23 */          \
-  {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16),	\
+  {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\
      0x00000000},	/* LD_REGS, r16 - r31 */			\
   {0x0000ffff,0x00000000},	/* NO_LD_REGS  r0 - r15 */              \
   {0xffffffff,0x00000000},	/* GENERAL_REGS, r0 - r31 */		\