@@ -32,10 +32,6 @@ typedef struct gtm_jmpbuf
unsigned long f[8];
} gtm_jmpbuf;
-/* Alpha generally uses a fixed page size of 8K. */
-#define PAGE_SIZE 8192
-#define FIXED_PAGE_SIZE 1
-
/* The size of one line in hardware caches (in bytes). */
#define HW_CACHELINE_SIZE 64
@@ -33,10 +33,6 @@ typedef struct gtm_jmpbuf
unsigned long pc;
} gtm_jmpbuf;
-/* ARM generally uses a fixed page size of 4K. */
-#define PAGE_SIZE 4096
-#define FIXED_PAGE_SIZE 1
-
/* ??? The size of one line in hardware caches (in bytes). */
#define HW_CACHELINE_SIZE 64
@@ -35,10 +35,6 @@ typedef struct gtm_jmpbuf
#endif
} gtm_jmpbuf;
-/* SH generally uses a fixed page size of 4K. */
-#define PAGE_SIZE 4096
-#define FIXED_PAGE_SIZE 1
-
/* ??? The size of one line in hardware caches (in bytes). */
#define HW_CACHELINE_SIZE 32
@@ -29,10 +29,6 @@ typedef struct gtm_jmpbuf
unsigned long pc;
} gtm_jmpbuf;
-/* UltraSPARC processors generally use a fixed page size of 8K. */
-#define PAGE_SIZE 8192
-#define FIXED_PAGE_SIZE 1
-
/* The size of one line in hardware caches (in bytes). We use the primary
cache line size documented for the UltraSPARC T1/T2. */
#define HW_CACHELINE_SIZE 16
@@ -52,10 +52,6 @@ typedef struct gtm_jmpbuf
/* x86 doesn't require strict alignment for the basic types. */
#define STRICT_ALIGNMENT 0
-/* x86 uses a fixed page size of 4K. */
-#define PAGE_SIZE 4096
-#define FIXED_PAGE_SIZE 1
-
/* The size of one line in hardware caches (in bytes). */
#define HW_CACHELINE_SIZE 64