commit 13b2976a9448565beabc41055fdcbd209cde949f
Author: Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Date: Wed Feb 26 15:55:13 2014 +0000
Add rev field to rtx costs.
@@ -54,6 +54,7 @@ struct alu_cost_table
const int bfi; /* Bit-field insert. */
const int bfx; /* Bit-field extraction. */
const int clz; /* Count Leading Zeros. */
+ const int rev; /* Reverse bits/bytes. */
const int non_exec; /* Extra cost when not executing insn. */
const bool non_exec_costs_exec; /* True if non-execution must add the exec
cost. */
@@ -39,6 +39,7 @@ const struct cpu_cost_table generic_extra_costs =
0, /* bfi. */
0, /* bfx. */
0, /* clz. */
+ 0, /* rev. */
COSTS_N_INSNS (1), /* non_exec. */
false /* non_exec_costs_exec. */
},
@@ -139,6 +140,7 @@ const struct cpu_cost_table cortexa53_extra_costs =
COSTS_N_INSNS (1), /* bfi. */
COSTS_N_INSNS (1), /* bfx. */
0, /* clz. */
+ 0, /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -239,6 +241,7 @@ const struct cpu_cost_table cortexa57_extra_costs =
COSTS_N_INSNS (1), /* bfi. */
0, /* bfx. */
0, /* clz. */
+ 0, /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -982,6 +982,7 @@ const struct cpu_cost_table cortexa9_extra_costs =
COSTS_N_INSNS (1), /* bfi. */
COSTS_N_INSNS (1), /* bfx. */
0, /* clz. */
+ 0, /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -1083,6 +1084,7 @@ const struct cpu_cost_table cortexa7_extra_costs =
COSTS_N_INSNS (1), /* bfi. */
COSTS_N_INSNS (1), /* bfx. */
COSTS_N_INSNS (1), /* clz. */
+ COSTS_N_INSNS (1), /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -1184,6 +1186,7 @@ const struct cpu_cost_table cortexa12_extra_costs =
0, /* bfi. */
COSTS_N_INSNS (1), /* bfx. */
COSTS_N_INSNS (1), /* clz. */
+ COSTS_N_INSNS (1), /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -1284,6 +1287,7 @@ const struct cpu_cost_table cortexa15_extra_costs =
COSTS_N_INSNS (1), /* bfi. */
0, /* bfx. */
0, /* clz. */
+ 0, /* rev. */
0, /* non_exec. */
true /* non_exec_costs_exec. */
},
@@ -1384,6 +1388,7 @@ const struct cpu_cost_table v7m_extra_costs =
0, /* bfi. */
0, /* bfx. */
0, /* clz. */
+ 0, /* rev. */
COSTS_N_INSNS (1), /* non_exec. */
false /* non_exec_costs_exec. */
},
@@ -9334,6 +9339,47 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code,
*cost = LIBCALL_COST (2);
return false;
+ case BSWAP:
+ if (arm_arch6)
+ {
+ if (mode == SImode)
+ {
+ *cost = COSTS_N_INSNS (1);
+ if (speed_p)
+ *cost += extra_cost->alu.rev;
+
+ return false;
+ }
+ }
+ else
+ {
+ /* No rev instruction available. Look at arm_legacy_rev
+ and thumb_legacy_rev for the form of RTL used then. */
+ if (TARGET_THUMB)
+ {
+ *cost = COSTS_N_INSNS (10);
+
+ if (speed_p)
+ {
+ *cost += 6 * extra_cost->alu.shift;
+ *cost += 3 * extra_cost->alu.logical;
+ }
+ }
+ else
+ {
+ *cost = COSTS_N_INSNS (5);
+
+ if (speed_p)
+ {
+ *cost += 2 * extra_cost->alu.shift;
+ *cost += extra_cost->alu.arith_shift;
+ *cost += 2 * extra_cost->alu.logical;
+ }
+ }
+ return true;
+ }
+ return false;
+
case MINUS:
if (TARGET_HARD_FLOAT && GET_MODE_CLASS (mode) == MODE_FLOAT
&& (mode == SFmode || !TARGET_VFP_SINGLE))
Hi all, In order to properly cost the rev16 instruction we need a new field in the cost tables. This patch adds that and specifies its value for the existing cost tables. Since rev16 is used to implement the BSWAP operation we add handling of that in the rtx cost function using the new field. Tested on arm-none-eabi and bootstrapped on an arm linux target. Does it look ok for stage1? Thanks, Kyrill 2014-03-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/arm/aarch-common-protos.h (alu_cost_table): Add rev field. * config/arm/aarch-cost-tables.h (generic_extra_costs): Specify rev cost. (cortex_a53_extra_costs): Likewise. (cortex_a57_extra_costs): Likewise. * config/arm/arm.c (cortexa9_extra_costs): Likewise. (cortexa7_extra_costs): Likewise. (cortexa12_extra_costs): Likewise. (cortexa15_extra_costs): Likewise. (v7m_extra_costs): Likewise. (arm_new_rtx_costs): Handle BSWAP.