From patchwork Mon Dec 23 06:52:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Belevantsev X-Patchwork-Id: 304708 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 5A1D32C009E for ; Mon, 23 Dec 2013 17:52:36 +1100 (EST) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; q=dns; s=default; b=TAgdExe51JCgUt5+JGrtVeFV21U86jVWmqZjguiIpPt Tar1DpebGRH54DPHGPr13h8vDMi7THclSjO7+n3A5lya58jSDDu9jDKWs9i7ewq/ uBY7xtQHfkKrFzg9aP6a3mYpwoDdArQuxhWVmezI5oYdIKHdoKgJrjqhI8vJH03s = DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :message-id:date:from:mime-version:to:cc:subject:content-type; s=default; bh=FMtlap7ihLM36JtMeGcc0TnJ0vE=; b=bZIyJr/YfpXWiDyX5 +XKMPqy6xTL/pppH14r04hI0a8E/Pen8SyZ5/vFoFypSnuxt3CvR6NhR2LkDEud3 QOUwT/58NCRS6uLtBNaSxPC6qVpyifclpd4DM7f9NZ6jcfiFMrpnvK6VzCA/h9oB UzKdoXEa+NpvMbWwoUnnakLxNY= Received: (qmail 28725 invoked by alias); 23 Dec 2013 06:52:28 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 28712 invoked by uid 89); 23 Dec 2013 06:52:27 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.2 required=5.0 tests=AWL, BAYES_00, RP_MATCHES_RCVD autolearn=ham version=3.3.2 X-HELO: mail.ispras.ru Received: from mail.ispras.ru (HELO mail.ispras.ru) (83.149.199.45) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 23 Dec 2013 06:52:25 +0000 Received: from [10.10.3.52] (pluton2.ispras.ru [83.149.199.44]) by mail.ispras.ru (Postfix) with ESMTPSA id BF184540151; Mon, 23 Dec 2013 10:52:22 +0400 (MSK) Message-ID: <52B7DDA9.4000308@ispras.ru> Date: Mon, 23 Dec 2013 10:52:25 +0400 From: Andrey Belevantsev User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:24.0) Gecko/20100101 Thunderbird/24.2.0 MIME-Version: 1.0 To: GCC Patches CC: Jakub Jelinek Subject: [PATCH, committed] Fix PR 57422 X-IsSubscribed: yes Hello, As described in the PR, the ICE reason was the typo made when introducing calls to add_hard_reg_set. Fixed by the first attached patch, bootstrapped and tested on both ia64 and x86_64, committed as obvious. The test case is very sensitive to the scheduler decisions (e.g. it didn't fail on trunk but only on the revision reported for me), so instead of adding the test I have put in the code two asserts checking that we can always schedule the fence instruction as is. This hunk was tested together with the first but committed separately. The first patch can be safely committed to 4.8, the second can stay on trunk only. Jakub, will it be fine with you? Andrey Index: gcc/ChangeLog =================================================================== *** gcc/ChangeLog (revision 206173) --- gcc/ChangeLog (revision 206174) *************** *** 1,6 **** --- 1,12 ---- 2013-12-23 Andrey Belevantsev PR rtl-optimization/57422 + * sel-sched.c (fill_vec_av_set): Assert that the fence insn + can always be scheduled in its current form. + + 2013-12-23 Andrey Belevantsev + + PR rtl-optimization/57422 * sel-sched.c (mark_unavailable_hard_regs): Fix typo when calling add_to_hard_reg_set. Index: gcc/sel-sched.c =================================================================== *** gcc/sel-sched.c (revision 206173) --- gcc/sel-sched.c (revision 206174) *************** fill_vec_av_set (av_set_t av, blist_t bn *** 3801,3806 **** --- 3801,3807 ---- signed char target_available; bool is_orig_reg_p = true; int need_cycles, new_prio; + bool fence_insn_p = INSN_UID (insn) == INSN_UID (FENCE_INSN (fence)); /* Don't allow any insns other than from SCHED_GROUP if we have one. */ if (FENCE_SCHED_NEXT (fence) && insn != FENCE_SCHED_NEXT (fence)) *************** fill_vec_av_set (av_set_t av, blist_t bn *** 3855,3863 **** if (sched_verbose >= 4) sel_print ("Expr %d has no suitable target register\n", INSN_UID (insn)); ! continue; } /* Filter expressions that need to be renamed or speculated when pipelining, because compensating register copies or speculation checks are likely to be placed near the beginning of the loop, --- 3856,3871 ---- if (sched_verbose >= 4) sel_print ("Expr %d has no suitable target register\n", INSN_UID (insn)); ! ! /* A fence insn should not get here. */ ! gcc_assert (!fence_insn_p); ! continue; } + /* At this point a fence insn should always be available. */ + gcc_assert (!fence_insn_p + || INSN_UID (FENCE_INSN (fence)) == INSN_UID (EXPR_INSN_RTX (expr))); + /* Filter expressions that need to be renamed or speculated when pipelining, because compensating register copies or speculation checks are likely to be placed near the beginning of the loop,